This project holds the firmware designs for RFSoC based Many-In-Many-Output (MIMO) control applications, featuring:
- Supports 3 hardware platforms:
- AMD ZCU208: with
xczu48dr-2fsvg1517e - LBL LBL208: with
xczu47dr-1fsvg1517e - AMD ZCU216: with
xczu29dr-2ffvf1760e
- AMD ZCU208: with
- Low phase noise sampling clock from external reference:
- ADC/DAC sampling frequencies can be generated by an external reference:
- CLK0 of LMK04828 on CLK104 board at J11, through LMK PLL chips (jitter cleaner)
- CLK1 of LMK04828, bypassing LMK PLL loops with optimal phase jitter
- Phase noise characterizaiton and optimizations
- ADC/DAC sampling frequencies can be generated by an external reference:
- Multi-Tile Synchronization (MTS):
- All available ADC/DAC channels are enabled with MTS
- RF mixers with aligned digital NCO phase:
- All digital up/down mixers are enabled with aligned NCO phase with respect to SYSREF clock
- Deterministic Latency
- Power-cycle deterministic latency on top of MTS
- MRF EVR interface
- Optional MRF timing interface and event receiver, to provide trigger and timestamps for user applications
- Power-cycle deterministic latency
- Self reconfiguration of timing link after loss of signals
- DDR4 PL RAM for long term data acquisition
- Triggered arbitrary waveform generation
- Synchronous ADC waveform capturing
- Chassis and peripheral support
- LBNL ALS Linac and Buncher digital Low-Level RF control system
This work was presented as in the Low Level 2025 Radio Frequency Workshop, October 2025, Newport News, VA, USA.
-
Download board image from pynq.io, e.g.
ZCU208-3.0.1.img. -
Flash SD card:
sudo umount /dev/sdb1 sudo dd bs=4M if=ZCU208-3.0.1.img of=/dev/sdb status=progress
See details. The SD card provides the boot image for the on-board processor, which runs Linux to facilitate access to the RFSoC.
-
Boot. Clone this repo and run:
./install.sh
This includes overlay drivers and EPICS IOCs installation. This step requires that the board has an open connection to the internet to clone repository and install the required Python packages.
SSH into the Linux machine running on the microcontroller by accessing the Xilinx account (username = password = 'xilinx' at the default ip address:
ssh xilinx@192.168.2.99
Clone the repository into the
/home/xilinx/jupyter_notebooksdirectory.Download the artifact of interest from GitLab artifacts and copy the bitfile (.bit) and hardware description file (.hwh) into the board in
/home/xilinx/jupyter_notebooks/pynq_llrf/mimo_mts/overlays/ -
[Optional] Change hostname. Example:
sudo -E pynq_hostname.sh lbl208
-
Connect a 500MHz, 0dBm clock to CLK104 J11. Connect SSMP cables for ADC/DAC sampling clocks.
-
Run:
-
For testing, run jupyter notebooks in
doc/, see details. -
For production, run EPICS IOC:
MIMOorLLRFIOC on 3 supported RFSoC boards are available.sudo -E <app>-<board>-ioc
where:
<app>is one of[mimo, llrf].<board>is one of[zcu208, lbl208, zcu216].
For example, for LLRF application running on LBL208 board,
sudo -E llrf-lbl208-ioc
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Once the IOC is running, the PVs below are available to read or write. Please replace
the prefix $P with ALS_LLRF_LBL208:pmbus.
The PVs below are read-only and return sensor readings from the M-CRPS enabled power supply. They are listed here with their nominal values:
$P:psu_vout: power-supply DC output voltage: 12.1 V$P:psu_vin: power-supply AC input voltage: 122.0 V$P:psu_iout: power-supply DC output current: 2.3 A$P:psu_iin: power-supply AC input current: 0.3 A$P:psu_pout: power-supply output power: 28.6 W$P:psu_pin: power-supply input power: 35.5 W$P:psu_temperature_{1,2}: temperature within the power-supply: 24.0 °C$P:psu_fan_speed_1: speed of the fan inside the power-supply: 4480 rpm$P:psu_status: The 16 bit status word of the power-supply. Bit definitions.
There are 2 chassis fans which can be speed-controlled with the following PVs:
$P:chassis_fan_speed_{1,2}:RBV: measured speed of the 2 chassis fans in [rpm]$P:chassis_fan_speed_{1,2}: set-point of the 2 chassis fans in [rpm]
If you use this design in your research or projects, please cite our papers.
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RFSoC based LLRF system design at ALS
@misc{du2025rfsocbasedllrfdesign, title={RFSoC Based LLRF System Design at ALS}, author={Qiang Du and Shreeharshini Murthy and Victoria Moore and Angel Jurado Lopez and Michael Chin and Shree Subhasish Basak and David Nett and Benjamin Flugstad}, year={2025}, eprint={2510.13192}, archivePrefix={arXiv}, primaryClass={physics.acc-ph}, url={https://arxiv.org/abs/2510.13192}, }
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Comparative Evaluation of Xilinx RFSoC Platform for Low-Level RF Systems
@misc{murthy2025comparativeevaluationxilinxrfsoc, title={Comparative Evaluation of Xilinx RFSoC Platform for Low-Level RF Systems}, author={Shreeharshini Dharanesh Murthy and Victoria Moore and Qiang Du and Angel Jurado and Michael Chin and Keith Penney and David Nett and Benjamin Flugstad}, year={2025}, eprint={2510.13711}, archivePrefix={arXiv}, primaryClass={physics.acc-ph}, url={https://arxiv.org/abs/2510.13711}, }