diff --git a/.gitignore b/.gitignore
index 6feadb46..dc30b765 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,3 +30,4 @@ __pycache__
 /build/
 .pytest_cache
 .history
+venv/
\ No newline at end of file
diff --git a/test/unittests/serialization_test/backwards_compatibility_test.py b/test/unittests/serialization_test/backwards_compatibility_test.py
index bed8ba53..0a0679dc 100644
--- a/test/unittests/serialization_test/backwards_compatibility_test.py
+++ b/test/unittests/serialization_test/backwards_compatibility_test.py
@@ -38,13 +38,13 @@ def test_backwards_compatibility(self):
             v1_xml = self._get_xml_element(full_v1_xml, name)
             v2_xml = self._get_xml_element(full_v2_xml, name)
             # Test the version 1 converted to version 2
-            self.assert_(
+            self.assertTrue(
                 xml_equal(v1_to_v2_xml, v2_xml),
                 "v2 produced from v1 doesn't match loaded:\n{}\n\nand"
                 "\n\n{}".format(xml_to_str(v1_to_v2_xml, pp=True),
                                 xml_to_str(v2_xml, pp=True)))
             # Test the version 2 converted to version 1
-            self.assert_(
+            self.assertTrue(
                 xml_equal(v2_to_v1_xml, v1_xml),
                 "v1 produced from v2 doesn't match loaded:\n{}\n\nand\n\n"
                 "{}".format(xml_to_str(v2_to_v1_xml, pp=True),
diff --git a/test/unittests/user_test/multi/component_test.py b/test/unittests/user_test/multi/component_test.py
index 6a1ebf14..953c1bcf 100644
--- a/test/unittests/user_test/multi/component_test.py
+++ b/test/unittests/user_test/multi/component_test.py
@@ -264,7 +264,7 @@ def test_unused_reduce_ports(self):
             name="TestMultiDyn",
             sub_components={'cell': test_dyn})
 
-        self.assert_(Constant('ADP1__cell', 0.0, un.per_time.origin.units)
+        self.assertTrue(Constant('ADP1__cell', 0.0, un.per_time.origin.units)
                      in test_multi.constants,
                      "Zero-valued constant wasn't inserted for unused reduce "
                      "port")