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refactor[STM32][DMA]: unify DMA config descriptors in HAL driver configs
- migrate STM32 HAL driver DMA config macros to shared descriptor init helpers - add overridable DMA priority and NVIC priority fields for board-level configs - align SPI, UART, I2C, SDIO, and QSPI DMA descriptors across visible STM32 series configs - simplify per-series DMA config definitions and reduce duplicated field assignments
1 parent 0578e39 commit b3aa4b0

60 files changed

Lines changed: 7542 additions & 3046 deletions

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‎bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/spi_config.h‎

Lines changed: 95 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
* Date Author Notes
88
* 2018-11-06 SummerGift first version
99
* 2019-01-05 SummerGift modify DMA support
10+
* 2026-04-13 wdfk-prog Unify DMA config descriptors
1011
*/
1112

1213
#ifndef __SPI_CONFIG_H__
@@ -20,67 +21,127 @@ extern "C" {
2021

2122
#ifdef BSP_USING_SPI1
2223
#ifndef SPI1_BUS_CONFIG
23-
#define SPI1_BUS_CONFIG \
24-
{ \
25-
.Instance = SPI1, \
26-
.bus_name = "spi1", \
27-
.irq_type = SPI1_IRQn, \
24+
#define SPI1_BUS_CONFIG \
25+
{ \
26+
.Instance = SPI1, \
27+
.bus_name = "spi1", \
28+
.irq_type = SPI1_IRQn, \
2829
}
2930
#endif /* SPI1_BUS_CONFIG */
3031
#endif /* BSP_USING_SPI1 */
3132

3233
#ifdef BSP_SPI1_TX_USING_DMA
34+
#ifndef SPI1_TX_DMA_PRIORITY
35+
#define SPI1_TX_DMA_PRIORITY DMA_PRIORITY_LOW
36+
#endif /* SPI1_TX_DMA_PRIORITY */
37+
38+
#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
39+
#define SPI1_TX_DMA_PREEMPT_PRIORITY 1
40+
#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
41+
42+
#ifndef SPI1_TX_DMA_SUB_PRIORITY
43+
#define SPI1_TX_DMA_SUB_PRIORITY 0
44+
#endif /* SPI1_TX_DMA_SUB_PRIORITY */
3345
#ifndef SPI1_TX_DMA_CONFIG
34-
#define SPI1_TX_DMA_CONFIG \
35-
{ \
36-
.dma_rcc = SPI1_TX_DMA_RCC, \
37-
.Instance = SPI1_TX_DMA_INSTANCE, \
38-
.dma_irq = SPI1_TX_DMA_IRQ, \
39-
}
46+
#define SPI1_TX_DMA_CONFIG \
47+
STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
48+
SPI1_TX_DMA_INSTANCE, \
49+
SPI1_TX_DMA_RCC, \
50+
SPI1_TX_DMA_IRQ, \
51+
SPI1_TX_DMA_CHANNEL, \
52+
0U, \
53+
SPI1_TX_DMA_PRIORITY, \
54+
SPI1_TX_DMA_PREEMPT_PRIORITY, \
55+
SPI1_TX_DMA_SUB_PRIORITY)
4056
#endif /* SPI1_TX_DMA_CONFIG */
4157
#endif /* BSP_SPI1_TX_USING_DMA */
4258

4359
#ifdef BSP_SPI1_RX_USING_DMA
60+
#ifndef SPI1_RX_DMA_PRIORITY
61+
#define SPI1_RX_DMA_PRIORITY DMA_PRIORITY_HIGH
62+
#endif /* SPI1_RX_DMA_PRIORITY */
63+
64+
#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
65+
#define SPI1_RX_DMA_PREEMPT_PRIORITY 0
66+
#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
67+
68+
#ifndef SPI1_RX_DMA_SUB_PRIORITY
69+
#define SPI1_RX_DMA_SUB_PRIORITY 0
70+
#endif /* SPI1_RX_DMA_SUB_PRIORITY */
4471
#ifndef SPI1_RX_DMA_CONFIG
45-
#define SPI1_RX_DMA_CONFIG \
46-
{ \
47-
.dma_rcc = SPI1_RX_DMA_RCC, \
48-
.Instance = SPI1_RX_DMA_INSTANCE, \
49-
.dma_irq = SPI1_RX_DMA_IRQ, \
50-
}
72+
#define SPI1_RX_DMA_CONFIG \
73+
STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
74+
SPI1_RX_DMA_INSTANCE, \
75+
SPI1_RX_DMA_RCC, \
76+
SPI1_RX_DMA_IRQ, \
77+
SPI1_RX_DMA_CHANNEL, \
78+
0U, \
79+
SPI1_RX_DMA_PRIORITY, \
80+
SPI1_RX_DMA_PREEMPT_PRIORITY, \
81+
SPI1_RX_DMA_SUB_PRIORITY)
5182
#endif /* SPI1_RX_DMA_CONFIG */
5283
#endif /* BSP_SPI1_RX_USING_DMA */
5384

5485
#ifdef BSP_USING_SPI2
5586
#ifndef SPI2_BUS_CONFIG
56-
#define SPI2_BUS_CONFIG \
57-
{ \
58-
.Instance = SPI2, \
59-
.bus_name = "spi2", \
60-
.irq_type = SPI2_IRQn, \
87+
#define SPI2_BUS_CONFIG \
88+
{ \
89+
.Instance = SPI2, \
90+
.bus_name = "spi2", \
91+
.irq_type = SPI2_IRQn, \
6192
}
6293
#endif /* SPI2_BUS_CONFIG */
6394
#endif /* BSP_USING_SPI2 */
6495

6596
#ifdef BSP_SPI2_TX_USING_DMA
97+
#ifndef SPI2_TX_DMA_PRIORITY
98+
#define SPI2_TX_DMA_PRIORITY DMA_PRIORITY_LOW
99+
#endif /* SPI2_TX_DMA_PRIORITY */
100+
101+
#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
102+
#define SPI2_TX_DMA_PREEMPT_PRIORITY 1
103+
#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
104+
105+
#ifndef SPI2_TX_DMA_SUB_PRIORITY
106+
#define SPI2_TX_DMA_SUB_PRIORITY 0
107+
#endif /* SPI2_TX_DMA_SUB_PRIORITY */
66108
#ifndef SPI2_TX_DMA_CONFIG
67-
#define SPI2_TX_DMA_CONFIG \
68-
{ \
69-
.dma_rcc = SPI2_TX_DMA_RCC, \
70-
.Instance = SPI2_TX_DMA_INSTANCE, \
71-
.dma_irq = SPI2_TX_DMA_IRQ, \
72-
}
109+
#define SPI2_TX_DMA_CONFIG \
110+
STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
111+
SPI2_TX_DMA_INSTANCE, \
112+
SPI2_TX_DMA_RCC, \
113+
SPI2_TX_DMA_IRQ, \
114+
SPI2_TX_DMA_CHANNEL, \
115+
0U, \
116+
SPI2_TX_DMA_PRIORITY, \
117+
SPI2_TX_DMA_PREEMPT_PRIORITY, \
118+
SPI2_TX_DMA_SUB_PRIORITY)
73119
#endif /* SPI2_TX_DMA_CONFIG */
74120
#endif /* BSP_SPI2_TX_USING_DMA */
75121

76122
#ifdef BSP_SPI2_RX_USING_DMA
123+
#ifndef SPI2_RX_DMA_PRIORITY
124+
#define SPI2_RX_DMA_PRIORITY DMA_PRIORITY_HIGH
125+
#endif /* SPI2_RX_DMA_PRIORITY */
126+
127+
#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
128+
#define SPI2_RX_DMA_PREEMPT_PRIORITY 0
129+
#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
130+
131+
#ifndef SPI2_RX_DMA_SUB_PRIORITY
132+
#define SPI2_RX_DMA_SUB_PRIORITY 0
133+
#endif /* SPI2_RX_DMA_SUB_PRIORITY */
77134
#ifndef SPI2_RX_DMA_CONFIG
78-
#define SPI2_RX_DMA_CONFIG \
79-
{ \
80-
.dma_rcc = SPI2_RX_DMA_RCC, \
81-
.Instance = SPI2_RX_DMA_INSTANCE, \
82-
.dma_irq = SPI2_RX_DMA_IRQ, \
83-
}
135+
#define SPI2_RX_DMA_CONFIG \
136+
STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
137+
SPI2_RX_DMA_INSTANCE, \
138+
SPI2_RX_DMA_RCC, \
139+
SPI2_RX_DMA_IRQ, \
140+
SPI2_RX_DMA_CHANNEL, \
141+
0U, \
142+
SPI2_RX_DMA_PRIORITY, \
143+
SPI2_RX_DMA_PREEMPT_PRIORITY, \
144+
SPI2_RX_DMA_SUB_PRIORITY)
84145
#endif /* SPI2_RX_DMA_CONFIG */
85146
#endif /* BSP_SPI2_RX_USING_DMA */
86147

‎bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/uart_config.h‎

Lines changed: 55 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
* Change Logs:
77
* Date Author Notes
88
* 2018-10-30 zylx first version
9+
* 2026-04-13 wdfk-prog Unify DMA config descriptors
910
*/
1011

1112
#ifndef __UART_CONFIG_H__
@@ -19,45 +20,77 @@ extern "C" {
1920

2021
#if defined(BSP_USING_UART1)
2122
#ifndef UART1_CONFIG
22-
#define UART1_CONFIG \
23-
{ \
24-
.name = "uart1", \
25-
.Instance = USART1, \
26-
.irq_type = USART1_IRQn, \
23+
#define UART1_CONFIG \
24+
{ \
25+
.name = "uart1", \
26+
.Instance = USART1, \
27+
.irq_type = USART1_IRQn, \
2728
}
2829
#endif /* UART1_CONFIG */
2930
#endif /* BSP_USING_UART1 */
3031

3132
#if defined(BSP_UART1_RX_USING_DMA)
33+
#ifndef UART1_RX_DMA_PRIORITY
34+
#define UART1_RX_DMA_PRIORITY DMA_PRIORITY_MEDIUM
35+
#endif /* UART1_RX_DMA_PRIORITY */
36+
37+
#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
38+
#define UART1_RX_DMA_PREEMPT_PRIORITY 0
39+
#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
40+
41+
#ifndef UART1_RX_DMA_SUB_PRIORITY
42+
#define UART1_RX_DMA_SUB_PRIORITY 0
43+
#endif /* UART1_RX_DMA_SUB_PRIORITY */
44+
3245
#ifndef UART1_DMA_RX_CONFIG
33-
#define UART1_DMA_RX_CONFIG \
34-
{ \
35-
.Instance = UART1_RX_DMA_INSTANCE, \
36-
.dma_rcc = UART1_RX_DMA_RCC, \
37-
.dma_irq = UART1_RX_DMA_IRQ, \
38-
}
46+
#define UART1_DMA_RX_CONFIG \
47+
STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
48+
UART1_RX_DMA_INSTANCE, \
49+
UART1_RX_DMA_RCC, \
50+
UART1_RX_DMA_IRQ, \
51+
0U, \
52+
0U, \
53+
UART1_RX_DMA_PRIORITY, \
54+
UART1_RX_DMA_PREEMPT_PRIORITY, \
55+
UART1_RX_DMA_SUB_PRIORITY)
3956
#endif /* UART1_DMA_RX_CONFIG */
4057
#endif /* BSP_UART1_RX_USING_DMA */
4158

4259
#if defined(BSP_USING_UART2)
4360
#ifndef UART2_CONFIG
44-
#define UART2_CONFIG \
45-
{ \
46-
.name = "uart2", \
47-
.Instance = USART2, \
48-
.irq_type = USART2_IRQn, \
61+
#define UART2_CONFIG \
62+
{ \
63+
.name = "uart2", \
64+
.Instance = USART2, \
65+
.irq_type = USART2_IRQn, \
4966
}
5067
#endif /* UART2_CONFIG */
5168
#endif /* BSP_USING_UART2 */
5269

5370
#if defined(BSP_UART2_RX_USING_DMA)
71+
#ifndef UART2_RX_DMA_PRIORITY
72+
#define UART2_RX_DMA_PRIORITY DMA_PRIORITY_MEDIUM
73+
#endif /* UART2_RX_DMA_PRIORITY */
74+
75+
#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
76+
#define UART2_RX_DMA_PREEMPT_PRIORITY 0
77+
#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
78+
79+
#ifndef UART2_RX_DMA_SUB_PRIORITY
80+
#define UART2_RX_DMA_SUB_PRIORITY 0
81+
#endif /* UART2_RX_DMA_SUB_PRIORITY */
82+
5483
#ifndef UART2_DMA_RX_CONFIG
55-
#define UART2_DMA_RX_CONFIG \
56-
{ \
57-
.Instance = UART2_RX_DMA_INSTANCE, \
58-
.dma_rcc = UART2_RX_DMA_RCC, \
59-
.dma_irq = UART2_RX_DMA_IRQ, \
60-
}
84+
#define UART2_DMA_RX_CONFIG \
85+
STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
86+
UART2_RX_DMA_INSTANCE, \
87+
UART2_RX_DMA_RCC, \
88+
UART2_RX_DMA_IRQ, \
89+
0U, \
90+
0U, \
91+
UART2_RX_DMA_PRIORITY, \
92+
UART2_RX_DMA_PREEMPT_PRIORITY, \
93+
UART2_RX_DMA_SUB_PRIORITY)
6194
#endif /* UART2_DMA_RX_CONFIG */
6295
#endif /* BSP_UART2_RX_USING_DMA */
6396

‎bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/dma_config.h‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,11 @@ extern "C" {
120120
#define SPI3_RX_DMA_RCC RCC_AHBENR_DMA2EN
121121
#define SPI3_RX_DMA_INSTANCE DMA2_Channel1
122122
#define SPI3_RX_DMA_IRQ DMA2_Channel1_IRQn
123+
#elif defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE)
124+
#define UART5_DMA_TX_IRQHandler DMA2_Channel1_IRQHandler
125+
#define UART5_TX_DMA_RCC RCC_AHBENR_DMA2EN
126+
#define UART5_TX_DMA_INSTANCE DMA2_Channel1
127+
#define UART5_TX_DMA_IRQ DMA2_Channel1_IRQn
123128
#endif
124129

125130
/* DMA2 channel2 */
@@ -149,6 +154,18 @@ extern "C" {
149154
#define SDIO_RX_DMA_RCC RCC_AHBENR_DMA2EN
150155
#define SDIO_RX_DMA_INSTANCE DMA2_Channel4
151156
#define SDIO_RX_DMA_IRQ DMA2_Channel4_5_IRQn
157+
#elif defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE)
158+
#if defined(DMA2_Channel4_5_IRQHandler) && defined(DMA2_Channel4_5_IRQn)
159+
#define UART5_DMA_RX_IRQHandler DMA2_Channel4_5_IRQHandler
160+
#define UART5_RX_DMA_IRQ DMA2_Channel4_5_IRQn
161+
#elif defined(DMA2_Channel4_IRQHandler) && defined(DMA2_Channel4_IRQn)
162+
#define UART5_DMA_RX_IRQHandler DMA2_Channel4_IRQHandler
163+
#define UART5_RX_DMA_IRQ DMA2_Channel4_IRQn
164+
#else
165+
#error "Unsupported STM32F1 UART5 RX DMA IRQ mapping"
166+
#endif
167+
#define UART5_RX_DMA_RCC RCC_AHBENR_DMA2EN
168+
#define UART5_RX_DMA_INSTANCE DMA2_Channel4
152169
#endif
153170

154171
/* DMA2 channel5 */

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