From 8554764e3b9680ffd36dc2270456301f6568c48e Mon Sep 17 00:00:00 2001
From: "run.mao" <1406108610@qq.com>
Date: Wed, 17 Jun 2026 16:17:49 +0800
Subject: [PATCH] Fix:Always use vmalle1is for kernel aspace; only use aside1is
 for user aspace with non-global PTE.

---
 libcpu/aarch64/common/include/tlb.h | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/libcpu/aarch64/common/include/tlb.h b/libcpu/aarch64/common/include/tlb.h
index bec19f6f2c3..ede4c7fd831 100644
--- a/libcpu/aarch64/common/include/tlb.h
+++ b/libcpu/aarch64/common/include/tlb.h
@@ -51,14 +51,18 @@ static inline void rt_hw_tlb_invalidate_all_local(void)
 static inline void rt_hw_tlb_invalidate_aspace(rt_aspace_t aspace)
 {
 #ifdef ARCH_USING_ASID
-    __asm__ volatile(
-        // ensure updates to pte completed
-        "dsb nshst\n"
-        "tlbi aside1is, %0\n"
-        "dsb nsh\n"
-        // after tlb in new context, refresh inst
-        "isb\n" ::"r"(TLBI_ARG(0ul, aspace->asid))
-            : "memory");
+      if (aspace == &rt_kernel_space) {
+          rt_hw_tlb_invalidate_all();
+      } else {
+          __asm__ volatile(
+            // ensure updates to pte completed
+            "dsb ishst\n"
+            "tlbi aside1is, %0\n"
+            "dsb ish\n"
+            // after tlb in new context, refresh inst
+            "isb\n" ::"r"(TLBI_ARG(0ul, aspace->asid))
+                : "memory");
+      }
 #else
     rt_hw_tlb_invalidate_all();
 #endif