From 771aadd9820aa76cddadea8929b3f80e87d9f6f1 Mon Sep 17 00:00:00 2001 From: Ralf Anton Beier Date: Mon, 25 May 2026 07:05:09 +0200 Subject: [PATCH] =?UTF-8?q?chore(release):=20v0.7.0=20=E2=80=94=20f64=20co?= =?UTF-8?q?degen=20+=20signing-e2e=20in=20CI?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Bumps workspace version to 0.7.0 and promotes the [Unreleased] entries (f64 ARM VFP-D codegen from #141, signing-e2e workflow from #140) to a v0.7.0 heading. Adds a falsification statement to the v0.7.0 notes per PulseEngine methodology: the release is wrong if (a) a covered f64 op miscompiles or fails to link on Cortex-M7DP, or (b) signing-e2e goes red on a clean v0.7.0 checkout. Case 3 (tamper-negative) is xfail until sigil#135 ships a fix; cases 1 and 2 must stay hard green. PRs included: #140 test(signing): wsc e2e in CI — pinned v0.9.0, sha256-verified #141 feat(backend): f64 codegen on Cortex-M7DP (non-optimized path) --- CHANGELOG.md | 16 ++++++++++++++++ Cargo.toml | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 14a9898..20aa65d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,22 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] +## [0.7.0] - 2026-05-25 + +Floating-point breadth + verifiable signing CI — synth now compiles +WASM modules with double-precision FP on Cortex-M7DP targets (i.MX RT1062 +class), and the sigil keyless-signing path is now exercised end-to-end +in CI against a sha256-pinned wsc v0.9.0. PRs #140 (Phase 5 e2e), +#141 (f64 codegen). + +**Falsification statement.** v0.7.0 would be wrong if (a) a WASM module +using only the f64 ops listed below produces an ELF that fails to link, +returns a synthesis error on a Cortex-M7DP target, or computes a result +that disagrees with the WASM reference on a covered op; or (b) the new +`signing-e2e.yml` workflow goes red on a clean `v0.7.0` checkout (cases +1 and 2 must remain hard checks; case 3 is xfail against +[sigil#135](https://github.com/pulseengine/sigil/issues/135)). + ### Added #### f64 codegen — ARM VFP-D end-to-end diff --git a/Cargo.toml b/Cargo.toml index e59733b..68e41f8 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -27,7 +27,7 @@ resolver = "2" # semver to publish, so the convention now catches up: workspace # version follows the release tag, bumped pre-tag in the release # checklist. See docs/release-process.md. -version = "0.6.0" +version = "0.7.0" edition = "2024" rust-version = "1.88" authors = ["PulseEngine Team"]