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Fix:Always use vmalle1is for kernel aspace; only use aside1is for use… #11500

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Fix:Always use vmalle1is for kernel aspace; only use aside1is for use… #11500

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20 changes: 12 additions & 8 deletions libcpu/aarch64/common/include/tlb.h
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Original file line number Diff line number Diff line change
Expand Up @@ -51,14 +51,18 @@ static inline void rt_hw_tlb_invalidate_all_local(void)
static inline void rt_hw_tlb_invalidate_aspace(rt_aspace_t aspace)
{
#ifdef ARCH_USING_ASID
__asm__ volatile(
// ensure updates to pte completed
"dsb nshst\n"
"tlbi aside1is, %0\n"
"dsb nsh\n"
// after tlb in new context, refresh inst
"isb\n" ::"r"(TLBI_ARG(0ul, aspace->asid))
: "memory");
if (aspace == &rt_kernel_space) {
rt_hw_tlb_invalidate_all();
} else {
__asm__ volatile(
// ensure updates to pte completed
"dsb ishst\n"
"tlbi aside1is, %0\n"
"dsb ish\n"
// after tlb in new context, refresh inst
"isb\n" ::"r"(TLBI_ARG(0ul, aspace->asid))
: "memory");
}
#else
rt_hw_tlb_invalidate_all();
#endif
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