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[bsp/rockchip]Add CI compilation checks for RK3500 BSP. #11502

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[bsp/rockchip]Add CI compilation checks for RK3500 BSP. #11502

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247a1bc
[bsp/rockchip]Add CI compilation checks for RK3500 BSP.
Rbb666 Jun 18, 2026
78f23f7
Adding to the macro definition that was mistakenly deleted in #11477
Rbb666 Jun 18, 2026
db0419d
[bsp/rockchip] Fix RK3528 PLL parent names initialization
Rbb666 Jun 18, 2026
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8 changes: 8 additions & 0 deletions .github/ALL_BSP_COMPILE.json
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Expand Up @@ -398,6 +398,14 @@
"zynqmp-a53-dfzu2eg"
]
},
{
"RTT_BSP": "aarch64-bsp-smart",
"RTT_TOOL_CHAIN": "sourcery-aarch64",
"RTT_SMART_TOOL_CHAIN": "aarch64-linux-musleabi",
"SUB_RTT_BSP": [
"rockchip/rk3500"
]
},
{
"RTT_BSP": "riscv-none",
"RTT_TOOL_CHAIN": "sourcery-riscv-none-embed",
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13 changes: 12 additions & 1 deletion .github/workflows/bsp_buildings.yml
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Expand Up @@ -144,7 +144,7 @@ jobs:
echo "RTT_EXEC_PATH=/opt/LLVMEmbeddedToolchainForArm-16.0.0-Linux-x86_64/bin" >> $GITHUB_ENV

- name: Install AArch64 ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-aarch64' && success() }}
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-aarch64' && matrix.legs.RTT_SMART_TOOL_CHAIN != 'aarch64-linux-musleabi' && success() }}
shell: bash
run: |
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.6/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf.tar.xz
Expand All @@ -153,6 +153,17 @@ jobs:
echo "RTT_EXEC_PATH=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin" >> $GITHUB_ENV
sudo apt-get -qq install device-tree-compiler

- name: Install AArch64 RT-Smart ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-aarch64' && matrix.legs.RTT_SMART_TOOL_CHAIN == 'aarch64-linux-musleabi' && success() }}
shell: bash
run: |
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/aarch64-linux-musleabi_for_x86_64-pc-linux-gnu_stable.tar.bz2
sudo tar xjf aarch64-linux-musleabi_for_x86_64-pc-linux-gnu_stable.tar.bz2 -C /opt
/opt/aarch64-linux-musleabi_for_x86_64-pc-linux-gnu/bin/aarch64-linux-musleabi-gcc --version
echo "RTT_EXEC_PATH=/opt/aarch64-linux-musleabi_for_x86_64-pc-linux-gnu/bin" >> $GITHUB_ENV
echo "RTT_CC_PREFIX=aarch64-linux-musleabi-" >> $GITHUB_ENV
sudo apt-get -qq install device-tree-compiler

- name: Install Mips ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-mips' && success() }}
shell: bash
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10 changes: 5 additions & 5 deletions bsp/rockchip/dm/clk/clk-rk3528.c
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Expand Up @@ -200,19 +200,19 @@ PNAMES(clk_32k_p) = { "xin_osc0_div", "clk_pvtm_32k" };
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)

static struct rockchip_pll_clk_cell rk3528_pll_apll =
PLL_RAW(pll_type_rk3328, PLL_APLL, "apll", mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(0), RK3528_MODE_CON,
PLL_RAW(pll_type_rk3328, PLL_APLL, "apll", &mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(0), RK3528_MODE_CON,
0, 0, RK3528_GRF_SOC_STATUS0, 0, rk3528_pll_rates);
static struct rockchip_pll_clk_cell rk3528_pll_cpll =
PLL_RAW(pll_type_rk3328, PLL_CPLL, "cpll", mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(8), RK3528_MODE_CON,
PLL_RAW(pll_type_rk3328, PLL_CPLL, "cpll", &mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(8), RK3528_MODE_CON,
2, 0, RK3528_GRF_SOC_STATUS0, 0, rk3528_pll_rates);
static struct rockchip_pll_clk_cell rk3528_pll_gpll =
PLL_RAW(pll_type_rk3328, PLL_GPLL, "gpll", mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(24), RK3528_MODE_CON,
PLL_RAW(pll_type_rk3328, PLL_GPLL, "gpll", &mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PLL_CON(24), RK3528_MODE_CON,
4, 0, RK3528_GRF_SOC_STATUS0, 0, rk3528_pll_rates);
static struct rockchip_pll_clk_cell rk3528_pll_ppll =
PLL_RAW(pll_type_rk3328, PLL_PPLL, "ppll", mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PCIE_PLL_CON(32), RK3528_MODE_CON,
PLL_RAW(pll_type_rk3328, PLL_PPLL, "ppll", &mux_pll_p, 1, RT_CLK_F_IS_CRITICAL, RK3528_PCIE_PLL_CON(32), RK3528_MODE_CON,
6, 0, RK3528_GRF_SOC_STATUS0, ROCKCHIP_PLL_FIXED_MODE, rk3528_pll_rates);
static struct rockchip_pll_clk_cell rk3528_pll_dpll =
PLL_RAW(pll_type_rk3328, PLL_DPLL, "dpll", mux_pll_p, 1, RT_CLK_F_IGNORE_UNUSED, RK3528_DDRPHY_PLL_CON(16), RK3528_DDRPHY_MODE_CON,
PLL_RAW(pll_type_rk3328, PLL_DPLL, "dpll", &mux_pll_p, 1, RT_CLK_F_IGNORE_UNUSED, RK3528_DDRPHY_PLL_CON(16), RK3528_DDRPHY_MODE_CON,
0, 0, RK3528_GRF_SOC_STATUS0, 0, rk3528_pll_rates);

static struct rockchip_clk_cell rk3528_uart0_fracmux =
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14 changes: 14 additions & 0 deletions bsp/rockchip/rk3500/.ci/attachconfig/ci.attachconfig.yml
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@@ -0,0 +1,14 @@
scons.args: &scons
scons_arg:
- '--strict'

devices.spi:
<<: *scons
kconfig:
- CONFIG_RT_USING_SPI=y
- CONFIG_RT_USING_QSPI=y
- CONFIG_RT_USING_DMA=y
- CONFIG_RT_USING_PIN=y
- CONFIG_RT_USING_PINCTRL=y
- CONFIG_RT_SPI_ROCKCHIP=y
- CONFIG_RT_SPI_ROCKCHIP_SFC=y
21 changes: 21 additions & 0 deletions components/drivers/dma/dma-pl330.c
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Expand Up @@ -212,6 +212,27 @@
/** @brief Microcode instruction: write memory barrier */
#define PL330_CMD_DMAWMB 0x13

/** @brief Microcode instruction sizes */
#define PL330_SIZE_DMAADDH 3
#define PL330_SIZE_DMAEND 1
#define PL330_SIZE_DMAFLUSHP 2
#define PL330_SIZE_DMALD 1
#define PL330_SIZE_DMALDP 2
#define PL330_SIZE_DMALP 2
#define PL330_SIZE_DMALPEND 2
#define PL330_SIZE_DMAKILL 1
#define PL330_SIZE_DMAMOV 6
#define PL330_SIZE_DMANOP 1
#define PL330_SIZE_DMARMB 1
#define PL330_SIZE_DMASEV 2
#define PL330_SIZE_DMAST 1
#define PL330_SIZE_DMASTP 2
#define PL330_SIZE_DMASTZ 1
#define PL330_SIZE_DMAWFE 2
#define PL330_SIZE_DMAWFP 2
#define PL330_SIZE_DMAWMB 1
#define PL330_SIZE_DMAGO 6

/** @brief DMAMOV to Source Address Register */
#define PL330_DIR_SAR 0
/** @brief DMAMOV to Channel Control Register */
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