ram: simplification of word slice creation by braydenlouie · Pull Request #9690 · The-OpenROAD-Project/OpenROAD

braydenlouie · 2026-03-08T01:49:59Z

Changes in RAM creation order

Switched to building out each word slice out (row by row)
For simplifying all the indices used in the current implementation for readability

Signed-off-by: braydenl9988 <braydenl9988@gmail.com>

Signed-off-by: Brayden Louie <braydenl9988@gmail.com>

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

gemini-code-assist

Code Review

This pull request refactors the RAM generation logic to build word slices row by row, which improves code readability and simplifies indexing. The changes are generally good and achieve the stated goal. I've found one bug in the layout generation logic that could lead to incorrect behavior, and a couple of minor issues related to code clarity and consistency. Once these are addressed, the changes will be a solid improvement.

_{Note: Security Review did not run due to the size of the PR.}

gemini-code-assist · 2026-03-08T01:52:31Z

src/ram/src/layout.cpp

+    for (int size = layouts_.size(); size <= tracks; ++size) {
+      if (orientation_ == odb::horizontal) {
+        layouts_.push_back(std::make_unique<Layout>(odb::vertical));
+      } else {
+        layouts_.push_back(std::make_unique<Layout>(odb::horizontal));
+      }
+    }


There is an off-by-one error in this loop condition. The loop for (int size = layouts_.size(); size <= tracks; ++size) will execute one more time than intended, creating an extra Layout object. For example, if layouts_ is empty and tracks is 10, this loop will run for size from 0 to 10 inclusive, creating 11 layouts instead of 10. The condition should be size < tracks to create the correct number of layouts.

Suggested change

for (int size = layouts_.size(); size <= tracks; ++size) {

if (orientation_ == odb::horizontal) {

layouts_.push_back(std::make_unique<Layout>(odb::vertical));

} else {

layouts_.push_back(std::make_unique<Layout>(odb::horizontal));

}

}

for (int size = layouts_.size(); size < tracks; ++size) {

if (orientation_ == odb::horizontal) {

layouts_.push_back(std::make_unique<Layout>(odb::vertical));

} else {

layouts_.push_back(std::make_unique<Layout>(odb::horizontal));

}

}

gemini-code-assist · 2026-03-08T01:52:31Z

src/ram/include/ram/ram.h

+  void makeCellByte(int start_idx,
+                    int row_idx,


The first parameter of makeCellByte is named start_idx here in the header, but it's named byte_idx in the implementation file (src/ram/src/ram.cpp). Using byte_idx is more descriptive as it represents the index of the byte within a word. For consistency and clarity, it would be best to use the same name in both the declaration and definition.

Suggested change

void makeCellByte(int start_idx,

int row_idx,

void makeCellByte(int byte_idx,

int row_idx,

gemini-code-assist · 2026-03-08T01:52:31Z

src/ram/src/ram.cpp

+    int start_idx
+        = byte * bits_per_byte;  // eventually replace with bits per byte


The comment // eventually replace with bits per byte is confusing because the variable bits_per_byte is already being used in the expression on the same line. This appears to be a stale comment from a previous stage of refactoring and should be removed to avoid confusion.

int start_idx = byte * bits_per_byte;

github-actions

clang-tidy made some suggestions

github-actions · 2026-03-08T01:56:14Z

src/ram/include/ram/ram.h

-      int byte_number,
-      const std::string& prefix,
-      int read_ports,
+  void makeCellByte(int start_idx,


warning: function 'ram::RamGen::makeCellByte' has a definition with different parameter names [readability-inconsistent-declaration-parameter-name]

void makeCellByte(int start_idx, ^

Additional context

src/ram/src/ram.cpp:139: the definition seen here

void RamGen::makeCellByte(const int byte_idx, ^

src/ram/include/ram/ram.h:121: differing parameters are named here: ('start_idx'), in definition: ('byte_idx')

void makeCellByte(int start_idx, ^

github-actions · 2026-03-08T01:56:14Z

src/ram/include/ram/ram.h

+                    const std::vector<std::vector<odb::dbBTerm*>>& data_output);
+
+  void makeWordSlice(
+      const int bytes_per_word,


warning: parameter 'bytes_per_word' is const-qualified in the function declaration; const-qualification of parameters only has an effect in function definitions [readability-avoid-const-params-in-decls]

Suggested change

const int bytes_per_word,

int bytes_per_word,

github-actions · 2026-03-08T01:56:14Z

src/ram/include/ram/ram.h

+
+  void makeWordSlice(
+      const int bytes_per_word,
+      const int row_idx,


warning: parameter 'row_idx' is const-qualified in the function declaration; const-qualification of parameters only has an effect in function definitions [readability-avoid-const-params-in-decls]

Suggested change

const int row_idx,

int row_idx,

github-actions · 2026-03-08T01:56:14Z

src/ram/include/ram/ram.h

+  void makeWordSlice(
+      const int bytes_per_word,
+      const int row_idx,
+      const int read_ports,


warning: parameter 'read_ports' is const-qualified in the function declaration; const-qualification of parameters only has an effect in function definitions [readability-avoid-const-params-in-decls]

Suggested change

const int read_ports,

int read_ports,

github-actions · 2026-03-08T01:56:14Z

src/ram/src/ram.cpp

+    vector<vector<dbBTerm*>> byte_outputs(read_ports,
+                                          vector<dbBTerm*>(bits_per_byte));
+    for (int port = 0; port < read_ports; ++port) {
+      std::copy_n(data_output[port].begin() + start_idx,


warning: no header providing "std::copy_n" is directly included [misc-include-cleaner]

src/ram/src/ram.cpp:5:

- #include <array> + #include <algorithm> + #include <array>

braydenlouie · 2026-03-08T02:06:04Z

@rovinski Here are the code simplification changes. At the moment the ok files are still not lining up, even when I tested it with the cmake build so still need to look into that. The differences are related to two of the pins and I believe some routing. I don't know if that's an issue with the changes I made or if they are a product of any changes to the other tools. The rest of the source files should be fixed barring linting and formatting changes.

github-actions · 2026-03-09T04:58:20Z

clang-tidy review says "All clean, LGTM! 👍"

github-actions · 2026-03-09T05:01:05Z

clang-tidy review says "All clean, LGTM! 👍"

rovinski

@braydenlouie let's start with this first round of review. All of the "byte" notation needs to be changed over to slice. After that I can take a look again.

rovinski · 2026-03-10T05:51:38Z

src/ram/src/layout.cpp

+      if (orientation_ == odb::horizontal) {
+        layouts_.push_back(std::make_unique<Layout>(odb::vertical));
+      } else {
+        layouts_.push_back(std::make_unique<Layout>(odb::horizontal));
+      }


Does this work?

Suggested change

if (orientation_ == odb::horizontal) {

layouts_.push_back(std::make_unique<Layout>(odb::vertical));

} else {

layouts_.push_back(std::make_unique<Layout>(odb::horizontal));

}

layouts_.push_back(std::make_unique<Layout>(orientation_.turn_90()));

rovinski · 2026-03-10T05:55:03Z

src/ram/include/ram/layout.h

+ public:
+  Grid(odb::Orientation2D orientation);
+
+  Grid(odb::Orientation2D orientation, int tracks);


Can we eliminate all use of the term "tracks"? A "track" has a specific meaning which is associated with metal tracks in global/detailed routing.

Should this be "rows" instead?

rovinski · 2026-03-10T06:03:59Z

src/ram/include/ram/ram.h

Are these declarations necessary? They should already exist by including layout.h.

rovinski · 2026-03-10T06:15:35Z

src/ram/src/ram.cpp

               odb::dbDatabase* db,
               utl::Logger* logger,
               pdn::PdnGen* pdngen,
               ppl::IOPlacer* ioPlacer,
               dpl::Opendp* opendp,
               grt::GlobalRouter* global_router,
               drt::TritonRoute* detailed_router)


There is a mismatch here between the argument names here and in the header file (some args have underscores some don't). Please standardize on one.

rovinski · 2026-03-10T06:18:25Z

src/ram/src/ram.cpp

-void RamGen::makeCellByte(Grid& ram_grid,
-                          const int byte_idx,
-                          const std::string& prefix,
+void RamGen::makeCellByte(const int byte_idx,


There should no longer be a concept of byte. All bytes should now be slices.
Remember how we discussed that we want each slice to be able to contain an arbitrary number of bits.

e.g. makeCellByte --> makeSlice (no reason to indicate "Cell" here)
byte_idx --> slice_idx
etc.

rovinski · 2026-03-10T06:23:47Z

src/ram/src/ram.cpp


-  int num_sites = ram_grid.getRowWidth() / db_sites->getWidth();
+  int num_sites = ram_grid_.getRowWidth() / db_sites->getWidth();
  for (int i = 0; i <= word_count; ++i) {  // extra for the layer of buffers


Please make this comment on a separate line and make it more explanatory. e.g.

// One extra row is added at the top of the array for placing input buffers

Actually, better yet, add the following

// One extra row is added at the top of the array for placing input buffers const int rows = word_count + 1; for (int i = 0; i < rows; ++i) { //...

rovinski · 2026-03-10T06:27:53Z

src/ram/src/ram.cpp


-  int max_y_coord = ram_grid.getHeight() * (word_count + 1);
-  int max_x_coord = ram_grid.getRowWidth();
+  int max_y_coord = ram_grid_.getHeight() * (word_count + 1);


After the previous suggestion:

Suggested change

int max_y_coord = ram_grid_.getHeight() * (word_count + 1);

int max_y_coord = ram_grid_.getHeight() * rows;

This makes it self-explanatory where the +1 comes from.

rovinski · 2026-03-10T06:31:40Z

src/ram/include/ram/layout.h

I'm confused about why the header file is copied here? Also how is this working - the old one is not deleted?

It's moved over here now that I have the grid as a member of the RamGen class, that way we're not constantly passing the ram_grid variable every single time, since we're only working with one grid anyway. The ram header file needs access to this file. Also, I'm considering renaming this to grid since the class that's being used in the cpp file is the grid. The old one should've been deleted. I must've missed it, but it's been fixed.

rovinski · 2026-03-10T06:33:47Z

src/ram/src/ram.cpp

-                                 data_input[local_bit],
-                                 outs),
-                     physical_col_idx);
+    ram_grid_.addCell(makeCellBit(name,


Any reason to name this makeCellBit and not just makeBit?

All of the make methods should be just converted to make as opposed to makeCell. It was just the naming scheme that I had when I was setting up the grid class initially.

Signed-off-by: Brayden Louie <braydenl9988@gmail.com> Signed-off-by: braydenlouie <braydenl9988@gmail.com>

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

github-actions · 2026-03-10T21:09:17Z

clang-tidy review says "All clean, LGTM! 👍"

github-actions · 2026-03-10T21:12:02Z

clang-tidy review says "All clean, LGTM! 👍"

github-actions · 2026-03-10T21:15:38Z

clang-tidy review says "All clean, LGTM! 👍"

github-actions · 2026-03-12T15:49:53Z

clang-tidy review says "All clean, LGTM! 👍"

rovinski

Marked all the byte locations. Should be slice and should not be hard-coded.

As we discussed in the meeting, it would be best to have a user flag -mask_size which represents the number of bits per slice. The -bytes_per_word flag should change to -word_size which is the number of bits per word. Return an error "Word size must be a multiple of mask size." if it's not an integer multiple.

rovinski · 2026-03-10T22:31:31Z

src/ram/src/layout.cpp

-    if (orientation_ == odb::horizontal) {
-      layouts_.push_back(std::make_unique<Layout>(odb::vertical));
-    }
+    layouts_.push_back(std::make_unique<Layout>(orientation_.turn_90()));


Is this the desired behavior? Note that before it wasn't pushing a value if orientation_ == odb::vertical. Now it does.

Yes, I think I never added a value for orientation == odb::vertical because I wasn't sure how accommodating this grid class should be. The current implementation stores the layouts as columns but keeping this could give us flexibility if we need to change to storing the layouts as rows (or if in the future someone has an additional use for this class)

rovinski · 2026-03-12T20:31:39Z

src/ram/src/ram.cpp

+           {{storage_cell_->findMTerm("CLK") ? "CLK" : "GATE", clock},
+            {"D", data_input},
+            {"Q", storage_net}});


Let's make a note to fix the hard-coded pin names in the next PR.

This was a change made in relation to the switch from using sky130's dlxtp to dfxtpfor generating a behavioral model. I can change it so that it's just hard-coded to CLK for now until the next PR if that's preferable.

What I meant was in a future PR, the dbSta interface should be used to find the clock port without needing knowing the name, such as in this PR: https://github.com/The-OpenROAD-Project/OpenROAD/pull/9680/changes#diff-98551916db74d39411a745c9ee3ff871d2b6473e09af929c8f78252dc85ddeafR119-R142

Although I'm not convinced that that PR does it in the simplest way. There's probably a getClockPort() function or something rather than iterating.

rovinski · 2026-03-12T20:32:22Z

src/ram/src/ram.cpp

-                          const vector<dbNet*>& selects,
-                          const array<dbNet*, 8>& data_input,
-                          const vector<array<dbBTerm*, 8>>& data_output)
+void RamGen::makeSlice(const int byte_idx,


rovinski · 2026-03-12T20:33:04Z

src/ram/src/ram.cpp

+  const int bits_per_byte = 8;
+  const int start_bit_idx = byte_idx * bits_per_byte;


rovinski · 2026-03-12T20:33:18Z

src/ram/src/ram.cpp

+  for (int local_bit = 0; local_bit < bits_per_byte; ++local_bit) {
+    auto name = fmt::format("{}.bit{}", prefix, start_bit_idx + local_bit);


rovinski · 2026-03-12T20:34:35Z

src/ram/src/ram.cpp

+  const int bits_per_byte = 8;
+
+  for (int byte = 0; byte < bytes_per_word; ++byte) {
+    int start_idx = byte * bits_per_byte;
+
+    vector<dbNet*> byte_inputs(data_input.begin() + start_idx,
+                               data_input.begin() + start_idx + bits_per_byte);
+    vector<vector<dbBTerm*>> byte_outputs(read_ports,
+                                          vector<dbBTerm*>(bits_per_byte));


rovinski · 2026-03-12T20:34:52Z

src/ram/src/ram.cpp

+                  bits_per_byte,
+                  byte_outputs[port].begin());
+    }
+
+    makeSlice(byte,
+              row_idx,
+              read_ports,
+              clock,
+              write_enable[byte]->getNet(),
+              selects,
+              byte_inputs,
+              byte_outputs);


rovinski · 2026-03-12T20:37:23Z

src/ram/src/ram.cpp

+  const int bits_per_byte = 8;
+  const int bits_per_word = bytes_per_word * bits_per_byte;


rovinski · 2026-03-12T20:37:42Z

src/ram/src/ram.cpp

-                   q_outputs_);
-    }
+  for (int row = 0; row < word_count; ++row) {
+    makeWord(bytes_per_word,


rovinski · 2026-03-12T20:38:10Z

src/ram/src/ram.cpp

+  }

-    for (int bit = 0; bit < 8; ++bit) {
+  for (int byte = 0; byte < bytes_per_word; ++byte) {


Signed-off-by: braydenlouie <braydenl9988@gmail.com>

github-actions · 2026-03-14T00:23:59Z

clang-tidy review says "All clean, LGTM! 👍"

rovinski

Just a few last things and also fixing the unit test

rovinski · 2026-03-14T03:28:29Z

src/ram/src/ram.cpp

  // cell for WE AND gate/inverter
  // extra column is for decoder cells
-  int col_cell_count = bytes_per_word * 9;
+  int col_cell_count = slices_per_word * 9;


Is this math and the comment above it still correct?

rovinski · 2026-03-14T03:35:38Z

src/ram/src/ram.cpp

  }

-  const int word_size_bit = bytes_per_word * 8;
+  const int word_size_bit = slices_per_word * 8;


Is this math still correct?

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

braydenlouie · 2026-03-15T05:15:12Z

I'll update the unit testing as soon as I get the chance to rebuild on a CMake build

github-actions · 2026-03-15T05:19:17Z

clang-tidy review says "All clean, LGTM! 👍"

github-actions · 2026-03-15T07:20:37Z

clang-tidy review says "All clean, LGTM! 👍"

Signed-off-by: Brayden Louie <braydenl9988@gmail.com>

github-actions · 2026-03-15T07:33:52Z

clang-tidy review says "All clean, LGTM! 👍"

rovinski

@braydenlouie after these clarity/simplification items this looks good to me. Please mark as ready to review and tag Matt.

rovinski · 2026-03-15T18:40:36Z

src/ram/include/ram/layout.h


  int numLayouts() const;

+  void setNumLayouts(int tracks);


tracks --> rows unless there's a better term for it

rovinski · 2026-03-15T18:52:34Z

src/ram/src/layout.cpp

+  if (idx == layouts_.size()) {
    layouts_.push_back(std::move(layout));
-  } else if (index < layouts_.size()) {
-    layouts_.insert(layouts_.begin() + index, std::move(layout));
-  } else if (index > layouts_.size()) {
+  } else if (idx < layouts_.size()) {
+    layouts_.insert(layouts_.begin() + idx, std::move(layout));
+  } else if (idx > layouts_.size()) {
    return false;
  }
  return true;


This can be simplified, because an insertion at the end is equivalent to a push_back

Suggested change

if (idx == layouts_.size()) {

layouts_.push_back(std::move(layout));

} else if (index < layouts_.size()) {

layouts_.insert(layouts_.begin() + index, std::move(layout));

} else if (index > layouts_.size()) {

} else if (idx < layouts_.size()) {

layouts_.insert(layouts_.begin() + idx, std::move(layout));

} else if (idx > layouts_.size()) {

return false;

}

return true;

if (idx > static_cast<int>(layouts_.size())) {

return false;

}

layouts_.insert(layouts_.begin() + idx, std::move(layout));

return true;

rovinski · 2026-03-15T18:57:18Z

src/ram/src/layout.cpp

+  if (num_layouts > layouts_.size()) {
+    for (int size = layouts_.size(); size < num_layouts; ++size) {
+      layouts_.push_back(std::make_unique<Layout>(orientation_.turn_90()));
+    }
+  }


You don't need the if condition because the for loop will already exit on the first check if num_layouts > layouts_.size()

Suggested change

if (num_layouts > layouts_.size()) {

for (int size = layouts_.size(); size < num_layouts; ++size) {

layouts_.push_back(std::make_unique<Layout>(orientation_.turn_90()));

}

}

for (int size = layouts_.size(); size < num_layouts; ++size) {

layouts_.push_back(std::make_unique<Layout>(orientation_.turn_90()));

}

rovinski · 2026-03-15T19:00:32Z

src/ram/src/ram.tcl

+  }
+
+  if { $word_size % $mask_size != 0 } {
+    utl::error RAM 26 "The -word_size argument must be divisible by the -mask_size argument."


For clarity

Suggested change

utl::error RAM 26 "The -word_size argument must be divisible by the -mask_size argument."

utl::error RAM 26 "The -word_size ($word_size) must be divisible by the -mask_size ($mask_size)."

rovinski · 2026-03-15T19:12:45Z

@gemini-code-assist /review

gemini-code-assist

Code Review

This pull request is a significant and valuable refactoring of the RAM generation logic, moving from a fixed byte-oriented approach to a more flexible slice-based implementation. The changes improve code clarity and configurability by introducing parameters like mask_size and word_size. The code is cleaner and more readable overall.

I've found one critical bug in the TCL script where an incorrect variable is used, which could lead to generating RAMs with the wrong dimensions. I've also included a suggestion to improve the clarity and efficiency of a section of C++ code in makeWord.

gemini-code-assist · 2026-03-15T19:15:13Z

src/ram/src/ram.tcl

-    -bytes_per_word $keys(-bytes_per_word) \
-    -word_count $keys(-word_count)]
+    -mask_size $keys(-mask_size) \
+    -word_size $keys(-mask_size) \


There appears to be a copy-paste error here. The -word_size argument for generate_ram_netlist is being set with the value of -mask_size ($keys(-mask_size)) instead of its own value ($keys(-word_size)). This will cause the RAM to be generated with an incorrect word size if -word_size and -mask_size are different.

-word_size $keys(-word_size) \

@braydenlouie this one is important to fix

gemini-code-assist · 2026-03-15T19:15:13Z

src/ram/src/ram.cpp

+    vector<vector<dbBTerm*>> slice_outputs(read_ports,
+                                           vector<dbBTerm*>(mask_size));
+    for (int port = 0; port < read_ports; ++port) {
+      std::copy_n(data_output[port].begin() + start_idx,
+                  mask_size,
+                  slice_outputs[port].begin());
+    }


The creation of slice_outputs can be made more concise and potentially more efficient by constructing the inner vectors directly from iterators instead of default-constructing and then copying. This would also improve readability, which aligns with the goals of this refactoring.

Suggested change

vector<vector<dbBTerm*>> slice_outputs(read_ports,

vector<dbBTerm*>(mask_size));

for (int port = 0; port < read_ports; ++port) {

std::copy_n(data_output[port].begin() + start_idx,

mask_size,

slice_outputs[port].begin());

}

std::vector<std::vector<odb::dbBTerm*>> slice_outputs;

slice_outputs.reserve(read_ports);

for (int port = 0; port < read_ports; ++port) {

const auto& port_outputs = data_output[port];

slice_outputs.emplace_back(port_outputs.begin() + start_idx,

port_outputs.begin() + start_idx + mask_size);

}

braydenlouie added 6 commits March 6, 2026 20:23

ram: start of code simplification + refactoring

2638c71

Signed-off-by: braydenl9988 <braydenl9988@gmail.com>

ram: edit to Bazel build and file includes

70e5515

Signed-off-by: Brayden Louie <braydenl9988@gmail.com>

ram: start of word slice creation

2b8e13e

Signed-off-by: Brayden Louie <braydenl9988@gmail.com>

commit before pulling behavioral verilog changes

46337bf

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

Merge branch 'The-OpenROAD-Project:master' into simplification

8e7f1eb

ram: simplification changes without cmake build testing

f8c8845

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

gemini-code-assist bot reviewed Mar 8, 2026

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github-actions bot reviewed Mar 8, 2026

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braydenlouie force-pushed the simplification branch from 4bccd78 to d1d7a1d Compare March 8, 2026 01:58

This was referenced Mar 9, 2026

ram: Cross platform testing - nangate45 #9468

Open

ram: add nangate45 cross-platform regression test #9680

Open

braydenlouie force-pushed the simplification branch from b894a5d to 0193870 Compare March 9, 2026 04:54

rovinski reviewed Mar 10, 2026

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braydenlouie force-pushed the simplification branch from 689e5ba to f6e4f31 Compare March 10, 2026 21:06

braydenlouie added 4 commits March 10, 2026 17:08

ram: change to net name, removal of debug log messages

e1fafef

Signed-off-by: Brayden Louie <braydenl9988@gmail.com> Signed-off-by: braydenlouie <braydenl9988@gmail.com>

ram: removed extra comments

37dfeee

Signed-off-by: Brayden Louie <braydenl9988@gmail.com> Signed-off-by: braydenlouie <braydenl9988@gmail.com>

ram: clang-tidy, format, buildifier changes

fcd3b5f

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

ram: first set of revisions to word simplification

d65b604

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

braydenlouie force-pushed the simplification branch from f6e4f31 to d65b604 Compare March 10, 2026 21:10

Merge branch 'The-OpenROAD-Project:master' into simplification

34750fb

rovinski reviewed Mar 12, 2026

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ram: removal of pre-defined byte size

a0f9594

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

rovinski reviewed Mar 14, 2026

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ram: removal of hard-coded bit sizes, small fix to net vectors

79486cd

Signed-off-by: braydenlouie <braydenl9988@gmail.com>

ram: updated ok files

f31396c

Signed-off-by: Brayden Louie <braydenl9988@gmail.com>

braydenlouie force-pushed the simplification branch from cb46b90 to f31396c Compare March 15, 2026 07:28

rovinski approved these changes Mar 15, 2026

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gemini-code-assist bot reviewed Mar 15, 2026

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		int start_idx
		= byte * bits_per_byte; // eventually replace with bits per byte

	int max_y_coord = ram_grid_.getHeight() * (word_count + 1);
	int max_y_coord = ram_grid_.getHeight() * rows;

		const int bits_per_byte = 8;
		const int start_bit_idx = byte_idx * bits_per_byte;

		for (int local_bit = 0; local_bit < bits_per_byte; ++local_bit) {
		auto name = fmt::format("{}.bit{}", prefix, start_bit_idx + local_bit);

		const int bits_per_byte = 8;
		const int bits_per_word = bytes_per_word * bits_per_byte;

	utl::error RAM 26 "The -word_size argument must be divisible by the -mask_size argument."
	utl::error RAM 26 "The -word_size ($word_size) must be divisible by the -mask_size ($mask_size)."

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