feat: implementation of transpiler for rv64

[876pol]

Resolves INT-6044.

Replaces the external rrs-lib crate with a custom decoder (crates/toolchain/transpiler/src/decoder.rs) that natively supports both RV32IM and RV64IM. Key changes from rrs-lib:

• ITypeShamt uses funct6 (6-bit) + shamt (6-bit) instead of funct7 (7-bit) + shamt (5-bit), so RV64 6-bit shifts work natively
• InstructionProcessor trait extended with RV64 methods (process_ld, process_sd, process_lwu, process_addw, process_subw, etc.) with default unimplemented!() so existing RV32 impls don't need to provide them
• 27 unit tests covering format struct extraction and instruction decoding
• Derived from rrs-lib (Apache 2.0 with LLVM exception); attribution header included

Other code changes:

• elf.rs: adds class: Class field so downstream can distinguish ELF32 vs ELF64
• util.rs: 8 new from_*_rv64 helpers — identical to RV32 versions but with RV64_REGISTER_NUM_LIMBS; from_i_type_shamt_rv64 simplified to 2 params (no separate shamt6)
• riscv.rs: adds RV64_REGISTER_NUM_LIMBS = 8
• 6 extension transpilers (sha2, keccak256, ecc, pairing, algebra, bigint) + crates/sdk: import swap from rrs_lib::instruction_formats to openvm_transpiler::decoder

Changes in crates/toolchain/tests:

• Renamed existing RV32 test data with rv32im- prefix for clarity
• Added rv64_transpiler_tests.rs: verifies ELF64 decoding, transpilation with no UNIMP, custom opcode presence, and phantom discriminants
• Added two hand-written RV64 assembly fixtures (with pre-compiled ELFs):
  • rv64im-stress.S: exercises every RV64IM instruction group the transpiler handles
  • rv64im-intrin.S: exercises custom OpenVM opcodes (TERMINATE, PHANTOM, HINT_STORED, HINT_BUFFER)

[github-actions]

group	app.proof_time_ms	app.cycles	app.cells_used	leaf.proof_time_ms	leaf.cycles	leaf.cells_used
verify_fibair	225	322,610	0	-	-	-
fibonacci	1,061	1,500,265	0	-	-	-
regex	2,328	4,137,600	0	-	-	-
ecrecover	722	124,173	0	-	-	-
pairing	1,445	1,745,757	0	-	-	-

Commit: 6d99906

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