FROMLIST: ASoC: qcom: lpass: Switch VA/WSA macros to PM clock framework#463
FROMLIST: ASoC: qcom: lpass: Switch VA/WSA macros to PM clock framework#463RaviHothi wants to merge 3 commits intoqualcomm-linux:qcom-6.18.yfrom
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… for runtime PM Convert the LPASS WSA macro codec driver to use the PM clock framework for runtime power management. The driver now relies on pm_clk helpers and runtime PM instead of manually enabling and disabling macro, dcodec, mclk, npl, and fsgen clocks. Runtime suspend and resume handling is delegated to the PM core via pm_clk_suspend() and pm_clk_resume(), while existing runtime PM callbacks continue to manage regcache state. This ensures clocks are enabled only when the WSA macro is active, improves power efficiency on LPASS platforms supporting LPI/island modes, and aligns the driver with common ASoC runtime PM patterns used across Qualcomm LPASS codec drivers. Link: https://lore.kernel.org/all/20260413121824.375473-2-ajay.nandam@oss.qualcomm.com/ Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
…for runtime PM Convert the LPASS VA macro codec driver to use the PM clock framework for runtime power management. The driver now relies on pm_clk helpers and runtime PM instead of manually enabling and disabling macro, dcodec, mclk, and npl clocks. All clock control during runtime suspend and resume is delegated to the PM core via pm_clk_suspend() and pm_clk_resume(). This change ensures clocks are only enabled when the VA macro is active, improves power efficiency on LPASS platforms supporting LPI/island modes, and aligns the driver with common ASoC runtime PM patterns used across Qualcomm LPASS codec drivers. Link: https://lore.kernel.org/all/20260413121824.375473-3-ajay.nandam@oss.qualcomm.com/ Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com>
…e programming The NPL clock is only present on some platforms. When it is absent, wsa->npl remains NULL, but the driver unconditionally programs its rate. Guard clk_set_rate() for the NPL clock so platforms without NPL do not attempt to access it. No functional change on platforms that provide the NPL clock. Link: https://lore.kernel.org/all/20260413121824.375473-4-ajay.nandam@oss.qualcomm.com/ Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
This keeps failing for your PRs, please take care of orbit mainline component association. |
Test Matrix
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Please check BT and smmu failures on this PR. ? |
Our PRs do not include any BT or SMMU-related changes; they are entirely independent. |
@vnarapar are these infra issue please confirm ? |
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Looks like smmu failed due to smmu excessive logging and BT due to systemd |
This series switches Qualcomm LPASS VA and WSA macro codecs to use the
generic PM clock framework for runtime power management.
The drivers previously managed clocks explicitly. This update adopts
devm_pm_clk_create() and of_pm_clk_add_clks(), allowing the core PM
framework to handle clock enable/disable during runtime suspend and
resume, reducing manual clock handling and aligning with upstream PM
usage. No functional changes intended beyond improved PM/clock handling.
CRs-Fixed: 4400613