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Change USB controller dr_mode from "host" to "peripheral" to enable fastboot support on the QCS6490 RB3Gen2 board. Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Add support for GCC_USB3_PRIM_PHY_PIPE_CLK which is required by the USB3 PHY on SC7280/QCM6490 platforms. Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Add a 100 ms delay after clearing the core soft reset bit to ensure the DWC3 controller has sufficient time to complete its reset sequence before subsequent register accesses. Without this delay, USB initialization can fail on some Qualcomm platforms, particularly when using super-speed capable PHYs like the QMP USB3-DP Combo PHY on SC7280/QCM6490. Taken from Linux commit f88359e ("usb: dwc3: core: Do core softreset when switch mode") Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Add support for the Qualcomm QMP USB3-DP Combo PHY found on
SC7280 and QCM6490 platforms. This driver currently implements
USB3 super-speed functionality of the combo PHY.
The QMP Combo PHY is a dual-mode PHY
that can operate in either USB3 mode or DisplayPort mode. This
initial implementation focuses on USB3 mode to enable Super-Speed
USB support.
Taken from Linux commit 3d25d46a255a ("pmdomain: qcom: rpmhpd: Add rpmhpd support for SM8750")
This patch is dependent on this patch: https://lore.kernel.org/u-boot/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com/
Enabled and tested the driver on Qualcomm RB3 Gen2 (QCS6490) board.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Automatically detect super-speed USB PHY driver availability and skip the USB speed fixup if driver is available, eliminating the need for manual configuration. Previously, U-Boot unconditionally limited USB to high-speed mode on all Qualcomm platforms because most lacked super-speed PHY drivers. This change implements runtime detection that checks if a PHY driver exists for the super-speed PHY node referenced by the DWC3 controller. The fixup is automatically skipped when a compatible driver is found, allowing the hardware to operate at full capability. Platforms without super-speed PHY drivers continue to receive the fixup automatically.
Enable the QMP Combo PHY driver to allow super-speed USB operation on QCM6490 platforms. Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
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This PR introduces comprehensive USB functionality improvements on Qualcomm platform QCM6490.
Switches the USB controller dr_mode from host to peripheral to enable fastboot support.
upstream link: https://lore.kernel.org/all/20251114064042.3835312-1-balaji.selvanathan@oss.qualcomm.com/
Adds USB3 Super‑Speed support by introducing the QMP USB3‑DP Combo PHY driver (ported from upstream Linux), required clocks, and automated USB speed fix‑ups.
upstream link: https://lore.kernel.org/all/20251203110735.1959862-1-balaji.selvanathan@oss.qualcomm.com/
commits for this PR: