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Remove the aes feature from many arm intrinsics#2110

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adamgemmell:dev/adagem01/aes-feature
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Remove the aes feature from many arm intrinsics#2110
adamgemmell wants to merge 1 commit into
rust-lang:mainfrom
adamgemmell:dev/adagem01/aes-feature

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@adamgemmell adamgemmell commented May 8, 2026

Fixes #2109

The aes rust feature represents FEAT_AES and FEAT_PMULL - from the architecture reference manual, these just add 4 new aes* instructions, and the p64 variants of PMULL/PMULL2.

Clang's header doesn't seem to gate any poly types on the aes feature, and many of the intrinsics with the aes feature are nops or just load/stores, for which the aes feature shouldn't matter. Accordingly, I've removed the aes feature from all intrinsics except the vaes* intrinsics, and ones using the p64 variants of PMULL[2] instructions

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rustbot commented May 8, 2026

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This changes public, stable signatures. I don't think it can be observed (it's just removing a constraint), but we should be careful.

Is there any way to validate that the new versions in fact work? I suspect that our CI just has the aes feature available anyway, so if any of these functions did still generate an aes instruction we'd not notice. Maybe qemu can be configured to just have neon, and not aes locally?

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@adamgemmell adamgemmell force-pushed the dev/adagem01/aes-feature branch from 242f4a3 to f950ee6 Compare May 21, 2026 17:49
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rustbot commented May 21, 2026

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

@adamgemmell adamgemmell force-pushed the dev/adagem01/aes-feature branch from f950ee6 to da89d24 Compare May 21, 2026 17:56
The exceptions to this are the vaes* intrinsics, and ones using the P64
variants of PMULL[2] instructions
@adamgemmell adamgemmell force-pushed the dev/adagem01/aes-feature branch from da89d24 to 4e13a78 Compare May 21, 2026 18:14
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This changes public, stable signatures. I don't think it can be observed (it's just removing a constraint), but we should be careful.

A few cases I can think of where removing a target feature could cause a breaking change:

  • It's an evil one that changes the ABI - aes is a pretty simple one that just allows the generation of some instruction variants.
  • It changes inlining behaviour - not technically breaking, but annoying, particularly with simd intrinsics. With the AArch64/ARM LLVM backends in particular, I expect that removing this feature will just allow the function to be inlined into more contexts rather than fewer.
  • Having to revert this patch, of course, could be disruptive if required.

Is there any way to validate that the new versions in fact work? I suspect that our CI just has the aes feature available anyway, so if any of these functions did still generate an aes instruction we'd not notice. Maybe qemu can be configured to just have neon, and not aes locally?

I did test this locally with some qemu cpus that don't support the crypto extension and it worked. I wanted to push it to CI to demonstrate it working but it's quite annoying to do so

If we rely on LLVM, it will fail to generate any instructions that require the aes feature when it's not available. intrinsic-test does not put target features on its test wrappers nor build with -Ctarget-feature, so those intrinics are running without the aes feature present.

Also, sayantn's concern at #2109 (comment) regarding GCC isn't fully resolved yet

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Should the p64 functions be gated under aes?

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