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loongarch: Use intrinsics::simd for vrepl{128}ve{0,i} #2129

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89 changes: 0 additions & 89 deletions crates/core_arch/src/loongarch64/lasx/generated.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -147,14 +147,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvhsubw_wu_hu(a: __v16u16, b: __v16u16) -> __v8i32;
#[link_name = "llvm.loongarch.lasx.xvhsubw.du.wu"]
fn __lasx_xvhsubw_du_wu(a: __v8u32, b: __v8u32) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvrepl128vei.b"]
fn __lasx_xvrepl128vei_b(a: __v32i8, b: u32) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvrepl128vei.h"]
fn __lasx_xvrepl128vei_h(a: __v16i16, b: u32) -> __v16i16;
#[link_name = "llvm.loongarch.lasx.xvrepl128vei.w"]
fn __lasx_xvrepl128vei_w(a: __v8i32, b: u32) -> __v8i32;
#[link_name = "llvm.loongarch.lasx.xvrepl128vei.d"]
fn __lasx_xvrepl128vei_d(a: __v4i64, b: u32) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvpackev.b"]
fn __lasx_xvpackev_b(a: __v32i8, b: __v32i8) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvpackev.h"]
Expand Down Expand Up @@ -525,16 +517,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvstx(a: __v32i8, b: *mut i8, c: i64);
#[link_name = "llvm.loongarch.lasx.xvextl.qu.du"]
fn __lasx_xvextl_qu_du(a: __v4u64) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvreplve0.b"]
fn __lasx_xvreplve0_b(a: __v32i8) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvreplve0.h"]
fn __lasx_xvreplve0_h(a: __v16i16) -> __v16i16;
#[link_name = "llvm.loongarch.lasx.xvreplve0.w"]
fn __lasx_xvreplve0_w(a: __v8i32) -> __v8i32;
#[link_name = "llvm.loongarch.lasx.xvreplve0.d"]
fn __lasx_xvreplve0_d(a: __v4i64) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvreplve0.q"]
fn __lasx_xvreplve0_q(a: __v32i8) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.vext2xv.h.b"]
fn __lasx_vext2xv_h_b(a: __v32i8) -> __v16i16;
#[link_name = "llvm.loongarch.lasx.vext2xv.w.h"]
Expand Down Expand Up @@ -1585,42 +1567,6 @@ pub fn lasx_xvhsubw_du_wu(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvhsubw_du_wu(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvrepl128vei_b<const IMM4: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM4, 4);
unsafe { transmute(__lasx_xvrepl128vei_b(transmute(a), IMM4)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvrepl128vei_h<const IMM3: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM3, 3);
unsafe { transmute(__lasx_xvrepl128vei_h(transmute(a), IMM3)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvrepl128vei_w<const IMM2: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM2, 2);
unsafe { transmute(__lasx_xvrepl128vei_w(transmute(a), IMM2)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvrepl128vei_d<const IMM1: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM1, 1);
unsafe { transmute(__lasx_xvrepl128vei_d(transmute(a), IMM1)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
Expand Down Expand Up @@ -2990,41 +2936,6 @@ pub fn lasx_xvextl_qu_du(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvextl_qu_du(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvreplve0_b(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvreplve0_b(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvreplve0_h(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvreplve0_h(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvreplve0_w(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvreplve0_w(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvreplve0_d(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvreplve0_d(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvreplve0_q(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvreplve0_q(transmute(a))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
Expand Down
85 changes: 85 additions & 0 deletions crates/core_arch/src/loongarch64/lasx/portable.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,82 @@ pub(crate) const unsafe fn simd_ilvl_d<T: Copy>(a: T, b: T) -> T {
simd_shuffle!(b, a, [0, 4, 2, 6])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_b<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(
a,
a,
[
I, I, I, I, I, I, I, I, I, I, I, I, I, I, I, I,
I + 16, I + 16, I + 16, I + 16, I + 16, I + 16, I + 16, I + 16,
I + 16, I + 16, I + 16, I + 16, I + 16, I + 16, I + 16, I + 16
]
)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_h<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(
a,
a,
[
I, I, I, I, I, I, I, I,
I + 8, I + 8, I + 8, I + 8, I + 8, I + 8, I + 8, I + 8
]
)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_w<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I, I, I, I + 4, I + 4, I + 4, I + 4])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_d<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I, I + 2, I + 2])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_replve0_b<T: Copy>(a: T) -> T {
simd_shuffle!(
a,
a,
[
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
]
)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_replve0_h<T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_replve0_w<T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [0, 0, 0, 0, 0, 0, 0, 0])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_replve0_d<T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [0, 0, 0, 0])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_replve0_q<T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [0, 1, 0, 1])
}

impl_vv!("lasx", lasx_xvpcnt_b, is::simd_ctpop, m256i, i8x32);
impl_vv!("lasx", lasx_xvpcnt_h, is::simd_ctpop, m256i, i16x16);
impl_vv!("lasx", lasx_xvpcnt_w, is::simd_ctpop, m256i, i32x8);
Expand All @@ -143,6 +219,11 @@ impl_vv!("lasx", lasx_xvneg_w, is::simd_neg, m256i, i32x8);
impl_vv!("lasx", lasx_xvneg_d, is::simd_neg, m256i, i64x4);
impl_vv!("lasx", lasx_xvfsqrt_s, is::simd_fsqrt, m256, f32x8);
impl_vv!("lasx", lasx_xvfsqrt_d, is::simd_fsqrt, m256d, f64x4);
impl_vv!("lasx", lasx_xvreplve0_b, simd_replve0_b, m256i, i8x32);
impl_vv!("lasx", lasx_xvreplve0_h, simd_replve0_h, m256i, i16x16);
impl_vv!("lasx", lasx_xvreplve0_w, simd_replve0_w, m256i, i32x8);
impl_vv!("lasx", lasx_xvreplve0_d, simd_replve0_d, m256i, i64x4);
impl_vv!("lasx", lasx_xvreplve0_q, simd_replve0_q, m256i, i64x4);

impl_gv!("lasx", lasx_xvreplgr2vr_b, ls::simd_splat, m256i, i8x32, i32);
impl_gv!("lasx", lasx_xvreplgr2vr_h, ls::simd_splat, m256i, i16x16, i32);
Expand Down Expand Up @@ -333,6 +414,10 @@ impl_vuv!("lasx", lasx_xvmini_bu, cs::simd_imin, m256i, u8x32, 5);
impl_vuv!("lasx", lasx_xvmini_hu, cs::simd_imin, m256i, u16x16, 5);
impl_vuv!("lasx", lasx_xvmini_wu, cs::simd_imin, m256i, u32x8, 5);
impl_vuv!("lasx", lasx_xvmini_du, cs::simd_imin, m256i, u64x4, 5);
impl_vuv!("lasx", lasx_xvrepl128vei_b, simd_replvei_b, m256i, i8x32, 4, const);
impl_vuv!("lasx", lasx_xvrepl128vei_h, simd_replvei_h, m256i, i16x16, 3, const);
impl_vuv!("lasx", lasx_xvrepl128vei_w, simd_replvei_w, m256i, i32x8, 2, const);
impl_vuv!("lasx", lasx_xvrepl128vei_d, simd_replvei_d, m256i, i64x4, 1, const);

impl_vug!("lasx", lasx_xvpickve2gr_w, is::simd_extract, m256i, i32x8, i32, 3);
impl_vug!("lasx", lasx_xvpickve2gr_d, is::simd_extract, m256i, i64x4, i64, 2);
Expand Down
44 changes: 0 additions & 44 deletions crates/core_arch/src/loongarch64/lsx/generated.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -155,14 +155,6 @@ unsafe extern "unadjusted" {
fn __lsx_vreplve_w(a: __v4i32, b: i32) -> __v4i32;
#[link_name = "llvm.loongarch.lsx.vreplve.d"]
fn __lsx_vreplve_d(a: __v2i64, b: i32) -> __v2i64;
#[link_name = "llvm.loongarch.lsx.vreplvei.b"]
fn __lsx_vreplvei_b(a: __v16i8, b: u32) -> __v16i8;
#[link_name = "llvm.loongarch.lsx.vreplvei.h"]
fn __lsx_vreplvei_h(a: __v8i16, b: u32) -> __v8i16;
#[link_name = "llvm.loongarch.lsx.vreplvei.w"]
fn __lsx_vreplvei_w(a: __v4i32, b: u32) -> __v4i32;
#[link_name = "llvm.loongarch.lsx.vreplvei.d"]
fn __lsx_vreplvei_d(a: __v2i64, b: u32) -> __v2i64;
#[link_name = "llvm.loongarch.lsx.vpackev.b"]
fn __lsx_vpackev_b(a: __v16i8, b: __v16i8) -> __v16i8;
#[link_name = "llvm.loongarch.lsx.vpackev.h"]
Expand Down Expand Up @@ -1525,42 +1517,6 @@ pub fn lsx_vreplve_d(a: m128i, b: i32) -> m128i {
unsafe { transmute(__lsx_vreplve_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vreplvei_b<const IMM4: u32>(a: m128i) -> m128i {
static_assert_uimm_bits!(IMM4, 4);
unsafe { transmute(__lsx_vreplvei_b(transmute(a), IMM4)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vreplvei_h<const IMM3: u32>(a: m128i) -> m128i {
static_assert_uimm_bits!(IMM3, 3);
unsafe { transmute(__lsx_vreplvei_h(transmute(a), IMM3)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vreplvei_w<const IMM2: u32>(a: m128i) -> m128i {
static_assert_uimm_bits!(IMM2, 2);
unsafe { transmute(__lsx_vreplvei_w(transmute(a), IMM2)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vreplvei_d<const IMM1: u32>(a: m128i) -> m128i {
static_assert_uimm_bits!(IMM1, 1);
unsafe { transmute(__lsx_vreplvei_d(transmute(a), IMM1)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
Expand Down
28 changes: 28 additions & 0 deletions crates/core_arch/src/loongarch64/lsx/portable.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -101,6 +101,30 @@ pub(crate) const unsafe fn simd_ilvl_d<T: Copy>(a: T, b: T) -> T {
simd_shuffle!(b, a, [0, 2])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_b<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I, I, I, I, I, I, I, I, I, I, I, I, I, I, I])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_h<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I, I, I, I, I, I, I])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_w<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I, I, I])
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn simd_replvei_d<const I: u32, T: Copy>(a: T) -> T {
simd_shuffle!(a, a, [I, I])
}

impl_vv!("lsx", lsx_vpcnt_b, is::simd_ctpop, m128i, i8x16);
impl_vv!("lsx", lsx_vpcnt_h, is::simd_ctpop, m128i, i16x8);
impl_vv!("lsx", lsx_vpcnt_w, is::simd_ctpop, m128i, i32x4);
Expand Down Expand Up @@ -305,6 +329,10 @@ impl_vuv!("lsx", lsx_vmini_bu, cs::simd_imin, m128i, u8x16, 5);
impl_vuv!("lsx", lsx_vmini_hu, cs::simd_imin, m128i, u16x8, 5);
impl_vuv!("lsx", lsx_vmini_wu, cs::simd_imin, m128i, u32x4, 5);
impl_vuv!("lsx", lsx_vmini_du, cs::simd_imin, m128i, u64x2, 5);
impl_vuv!("lsx", lsx_vreplvei_b, simd_replvei_b, m128i, i8x16, 4, const);
impl_vuv!("lsx", lsx_vreplvei_h, simd_replvei_h, m128i, i16x8, 3, const);
impl_vuv!("lsx", lsx_vreplvei_w, simd_replvei_w, m128i, i32x4, 2, const);
impl_vuv!("lsx", lsx_vreplvei_d, simd_replvei_d, m128i, i64x2, 1, const);

impl_vug!("lsx", lsx_vpickve2gr_b, is::simd_extract, m128i, i8x16, i32, 4);
impl_vug!("lsx", lsx_vpickve2gr_h, is::simd_extract, m128i, i16x8, i32, 3);
Expand Down
14 changes: 14 additions & 0 deletions crates/core_arch/src/loongarch64/simd.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -257,6 +257,20 @@ macro_rules! impl_vuv {
}
}
};
($ft:literal, $name:ident, $op:ident, $oty:ty, $ity:ident, $ibs:expr, const) => {
#[inline]
#[target_feature(enable = $ft)]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn $name<const IMM: u32>(a: $oty) -> $oty {
static_assert_uimm_bits!(IMM, $ibs);
unsafe {
let a: $ity = transmute(a);
let r: $ity = $op::<IMM, _>(a);
transmute(r)
}
}
};
}

pub(super) use impl_vuv;
Expand Down
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