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6 changes: 6 additions & 0 deletions kernel/src/arch_impl/aarch64/exception.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1028,6 +1028,12 @@ pub extern "C" fn handle_irq() {
crate::drivers::usb::xhci::handle_interrupt();
}
}
// VirtIO GPU PCI interrupt dispatch (MSI completion)
if let Some(gpu_irq) = crate::drivers::virtio::gpu_pci::get_irq() {
if irq_id == gpu_irq {
crate::drivers::virtio::gpu_pci::handle_interrupt();
}
}
}

// Should not happen - GIC filters invalid IDs (1020+)
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5 changes: 0 additions & 5 deletions kernel/src/arch_impl/aarch64/timer_interrupt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -168,11 +168,6 @@ pub extern "C" fn timer_interrupt_handler() {
// Increment timer interrupt counter (used for debugging when needed)
let _count = TIMER_INTERRUPT_COUNT.fetch_add(1, Ordering::Relaxed) + 1;

// Debug breadcrumb: print '.' every 200 ticks (~1 second) to verify timer is alive
if cpu_id == 0 && _count % 200 == 0 {
raw_serial_char(b'.');
}

// CPU 0 only: poll input devices (single-device, not safe from multiple CPUs)
if cpu_id == 0 {
poll_keyboard_to_stdin();
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9 changes: 8 additions & 1 deletion kernel/src/drivers/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,14 @@ pub fn init() -> usize {
serial_println!("[drivers] Found {} VirtIO PCI devices", virtio_devices.len());

match virtio::gpu_pci::init() {
Ok(()) => serial_println!("[drivers] VirtIO GPU (PCI) initialized"),
Ok(()) => {
serial_println!("[drivers] VirtIO GPU (PCI) initialized");
// Attempt to initialize VirGL 3D acceleration if the device supports it
match virtio::gpu_pci::virgl_init() {
Ok(()) => serial_println!("[drivers] VirGL 3D acceleration active"),
Err(e) => serial_println!("[drivers] VirGL init skipped: {}", e),
}
}
Err(e) => serial_println!("[drivers] VirtIO GPU (PCI) init failed: {}", e),
}

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10 changes: 7 additions & 3 deletions kernel/src/drivers/usb/xhci.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4122,7 +4122,7 @@ fn setup_xhci_msi(pci_dev: &crate::drivers::pci::Device) -> u32 {
// On Parallels ARM64, GICv2m is at 0x02250000 (discovered from MADT).
const PARALLELS_GICV2M_BASE: u64 = 0x0225_0000;
let gicv2m_base = crate::platform_config::gicv2m_base_phys();
let (base, spi_base, spi_count) = if gicv2m_base != 0 {
let (base, _spi_base, spi_count) = if gicv2m_base != 0 {
// Already probed
(
gicv2m_base,
Expand All @@ -4146,8 +4146,12 @@ fn setup_xhci_msi(pci_dev: &crate::drivers::pci::Device) -> u32 {
return 0;
}

// Step 3: Allocate first available SPI for XHCI
let spi = spi_base;
// Step 3: Allocate next available SPI for XHCI
let spi = crate::platform_config::allocate_msi_spi();
if spi == 0 {
xhci_trace_note(0, "err:alloc_spi");
return 0;
}
let intid = spi; // GIC INTID = SPI number for GICv2m

// Step 4: Program PCI MSI registers
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