Add wolfBoot port for STM32N6 (NUCLEO-N657X0-Q)#720
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Add wolfBoot port for STM32N6 (NUCLEO-N657X0-Q)#720aidangarske wants to merge 1 commit intomasterfrom
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Pull request overview
Adds a new wolfBoot port for STM32N6 / NUCLEO-N657X0-Q, including a bare-metal HAL for XSPI2 NOR XIP, flash/debug tooling via OpenOCD, and CI/docs updates.
Changes:
- Adds STM32N6 HAL + linker scripts to run wolfBoot from SRAM and boot an XIP app from external NOR
- Adds a STM32N6 test-app, build integration, example config, and CI build job
- Adds OpenOCD configuration + a flash script and updates target documentation
Reviewed changes
Copilot reviewed 13 out of 13 changed files in this pull request and generated 7 comments.
Show a summary per file
| File | Description |
|---|---|
| tools/scripts/stm32n6_flash.sh | Automates building/flashing via OpenOCD and boots wolfBoot from SRAM |
| test-app/app_stm32n6.c | New bare-metal test app for STM32N6 (LED + XIP flash op + wolfBoot_success) |
| test-app/Makefile | Adds stm32n6 build flags/linker script integration for the test app |
| test-app/ARM-stm32n6.ld | Linker script for XIP test-app in NOR and runtime data in SRAM |
| hal/stm32n6.ld | Linker script for wolfBoot executing from SRAM |
| hal/stm32n6.h | STM32N6 register/bit definitions for clocks, GPIO, XSPI2, UART, cache ops |
| hal/stm32n6.c | STM32N6 HAL implementation (clock/power, XSPI2 NOR driver, flash/ext_flash API) |
| docs/Targets.md | New STM32N6 target documentation (memory map, build/flash/debug workflow) |
| config/openocd/openocd_stm32n6.cfg | OpenOCD target config + XSPI2 init and stmqspi flash bank setup |
| config/examples/stm32n6.config | Example wolfBoot config for STM32N6 + external flash partitioning |
| arch.mk | Adds stm32n6 target selection and ARM build settings (mcpu=cortex-m55, origins) |
| Makefile | Sets stm32n6 main targets and introduces a stm32n6-specific flash target |
| .github/workflows/test-configs.yml | Adds CI build verification job for stm32n6 example config |
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Add HAL, build system, test app, and documentation for the STM32N6 (Cortex-M55) targeting the NUCLEO-N657X0-Q board. wolfBoot runs from SRAM as FSBL and boots a signed application via XIP from external NOR flash on XSPI2.
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Pull request overview
Copilot reviewed 13 out of 13 changed files in this pull request and generated 4 comments.
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Description
sets up XSPI2, probes the NOR flash, and then flash write_image programs it. On top of that, we also need to load_image wolfBoot into SRAM and manually set up VTOR/MSP/resume
Details
hal/stm32n6.c,hal/stm32n6.h): Clock, PWR, GPIO, XSPI2, cache, and debug UART. All flash functions are RAMFUNCTION for safe operation fromXIP.
arch.mk,Makefile,test-app/Makefile): CORTEX_M33 with -mcpu=cortex-m55 override, EXT_FLASH for update/swap partitionstest-app/app_stm32n6.c): LED blink on Port G (active LOW), flash erase test, wolfBoot_success() call from XIPhal/stm32n6.ld,test-app/ARM-stm32n6.ld): wolfBoot at 0x34000000 (SRAM), test app RAM at 0x34010000tools/scripts/stm32n6_flash.sh,config/openocd/openocd_stm32n6.cfg): Programs NOR flash and loads wolfBoot to SRAM viaOpenOCD/ST-Link
config/examples/stm32n6.config): ECC256+SHA256, boot at 0x70020000, update at 0x70120000.github/workflows/test-configs.yml): Build verificationdocs/Targets.md): Memory layout, build/flash instructions, XIP constraints, debuggingTest plan
makewith stm32n6.config)