Merge/9.1 into 10.x#11626
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Both osdGetSystemMessage() and osdGetMultiFunctionMessage() accumulate
message pointers into a fixed-size array with no bounds checking. With
recent additions (geozone avoidance, pitot validation, etc.) the number
of potential writes exceeds the array size, causing stack corruption.
Introduce a scoped ADD_MSG() macro that guards each write:
#define ADD_MSG(msg) if (messageCount < ARRAYLEN(messages)) \
messages[messageCount++] = (msg)
Excess messages are silently dropped rather than written past the end
of the array. The macro is #undef'd at the end of each function.
Fixes: #10048 (Yury-MonZon)
Removed commented-out timer definitions and adjusted the order of active timer definitions.
I just tested random SSD1315 from aliexpress and it worked without any modifications.
PLL2M was hardcoded to 5, which assumes HSE = 8 MHz. On KAKUTEH7WING (HSE = 16 MHz) this gives VCO = 16/5 * 500 = 1600 MHz (out of spec) and SDMMC clock = 400 MHz instead of the required 200 MHz. Fix: compute PLL2M as HSE_VALUE / 1600000, pinning the VCO input to exactly 1.6 MHz for any HSE frequency. With N=500 this gives VCO=800 MHz: HSE=8 MHz: M=5, N=500 → VCO=800 MHz (identical to original) HSE=16 MHz: M=10, N=500 → VCO=800 MHz (correct for KAKUTEH7WING) PLL2R/4 = 200 MHz (SDMMC), PLL2P/2 = 400 MHz. VCIRANGE_0 (1–2 MHz) is correct for the 1.6 MHz VCI input on all targets. Also adds STATIC_ASSERT to catch future targets with non-multiple HSE, and corrects the PLL2P comment (was "500Mhz", should be "400Mhz"). Fixes #11594
If PLL2 fails to lock at startup the SDMMC clock is dead and the SD card will fail silently. Call Error_Handler() (infinite loop) on failure to make the fault visible rather than continuing into undefined behaviour.
PLL1 VCI input is HSE/M = 2 MHz on all H7 targets, which falls in the 2-4 MHz range (VCIRANGE_1). The previous VCIRANGE_2 (4-8 MHz) was incorrect and affected PLL charge pump calibration. Fixes #11602
Remove redundant prose that duplicated the assert, remove board-specific name from shared init code, and shorten the assert slug to match codebase conventions.
…cceleration function
The ICM42688 gyro on IMU1 was registered with DEVHW_MPU6000 instead of DEVHW_ICM42605, preventing the ICM42605 driver from detecting it. Boards populated with ICM42688 chips would fail to detect the primary gyro. The IMU2 registration was already correct. Affected targets: GEPRC_TAKER_H743, GEPRCF745_BT_HD Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
* timeUnixUsec is declared as timeUs_t ... * The new SoftRF section says SYS_STATUS, VFR_HUD, and ATTITUDE are “not supported”, .... * Spelling/casing: the receiver name is “SoftRF” ... * Spelling/casing: use “MAVLink” ... * Formatting deviates from the prevailing style i ... * The comment on the EXTRA2 stream rate still says “HEARTBEATs are important” ...
* fix mavlink data stream, create new schedule for HB and sys time
* Add new target: AEDROXH7 (Airbot Systems AEDROX H7) STM32H743 flight controller with ICM42688P gyro, W25N01G NAND flash, DPS310 baro, MAX7456 analog OSD, HD OSD via MSP DisplayPort, and 8 motor outputs split across TIM1 and TIM8. SPI3 MOSI on PB2 requires explicit GPIO_AF7_SPI3 override. Magnetometer enabled on I2C1 (hardware present, not in BF config). * AEDROXH7: replace UART4 with DroneCAN on PD0/PD1 PD0/PD1 connect to the CAN transceiver (CANL/CANH pads visible on board), not to a user-accessible UART4 header. Replace UART4 with USE_DRONECAN defines. CAN standby pin TBD pending INAV syntax confirmation. * AEDROXH7: add CAN1_STANDBY PD3 (not yet tested) * CI: re-trigger build to pick up fc_msp.c sign-compare fix in maintenance-9.x
…top functions STM32 RM (RM0090 §10.3.17) requires disabling the timer DMA request before disabling the DMA stream. The previous code had this backwards in five places across three driver files, creating a race window where the timer could issue a DMA request to an already-disabled stream. The incorrect ordering: DMA_Cmd(stream, DISABLE); // stream disabled first TIM_DMACmd(tim, source, DISABLE); // timer request disabled second Corrected ordering: TIM_DMACmd(tim, source, DISABLE); // timer request disabled first DMA_Cmd(stream, DISABLE); // stream disabled second Affected locations: - timer_impl_stdperiph.c: impl_timerPWMStopDMA, impl_timerPWMPrepareDMA, DMA TC IRQ handler - timer_impl_stdperiph_at32.c: impl_timerPWMStopDMA - timer_impl_hal.c: DMA TC IRQ handler The correct ordering was already used in impl_timerPWMSetDMACircular (both stdperiph files) and impl_timerPWMStopDMA (HAL file), which serve as the reference implementation.
Removed redundant phrases and clarified manufacturer information.
# Conflicts: # src/main/io/osd.c
[FIX] Prevent stack smashing via unbounded OSD message array writes
…dcoded constant The configurable CLI setting added in #11215 was based on a default of 2 with no empirical basis. Blackbox analysis of real flight data shows i-term rates of 4–9 units/s (median) and up to 30 units/s (90th percentile) during settled cruise flight. A hardcoded constant of 30 gives reasonable protection against turbulence-driven i-term spikes without exposing a tuning knob that pilots cannot meaningfully calibrate.
…m-rate-limit-setting FW autotrim: replace servo_autotrim_iterm_rate_limit setting with hardcoded constant
Bump firmware version to 9.1.0
pinioBoxConfig_t was missing from the reference database despite SPEEDYBEEF745AIO having USE_PINIOBOX defined. The struct is uint8_t permanentId[PINIO_COUNT] (4 bytes), PG version 1.
…nioBoxConfig_t Add pinioBoxConfig_t to PG struct sizes reference database
- Add version string format section: lowercase rc + hyphen required by Configurator firmware flasher regex (uppercase RC causes firmware to be invisible in flasher after upload) - Fix rename script: use hyphen separator in output filename to match the required inav_<version>-rc<n>_<TARGET>.hex pattern - Replace directory-flattening find command with platform-organized mkdir/mv; flattening caused a Windows .exe inside macOS DMG in 9.0.0 - Add PR branch verification step in changelog section: gh pr list shows PRs by date regardless of target branch, so PRs on maintenance-10.x can appear falsely - Update gh release create examples: add --prerelease for RC releases, use --target <sha> for atomic tagging at a specific commit - Add post-publish verification: confirm firmware appears in Configurator Firmware Flasher before publishing the Configurator release
Commit 58dc107 re-added SERVO_AUTOTRIM_FILTER_CUTOFF and related constants to servos.c as local #defines, but they were already moved to servos.h by a prior refactor (dcc404e). The duplicate caused a build error: the .c definition used integer 1 while the header has 1.0f, triggering -Werror,-Wmacro-redefined on all targets. Remove the redundant block from servos.c and add the one genuinely new constant (SERVO_AUTOTRIM_ITERM_RATE_LIMIT) to servos.h alongside the existing autotrim constants.
…dcoded constant The configurable CLI setting added in #11215 was based on a default of 2 with no empirical basis. Blackbox analysis of real flight data shows i-term rates of 4–9 units/s (median) and up to 30 units/s (90th percentile) during settled cruise flight. A hardcoded constant of 30 gives reasonable protection against turbulence-driven i-term spikes without exposing a tuning knob that pilots cannot meaningfully calibrate.
9.1 catch up
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Test firmware build ready — commit Download firmware for PR #11626 238 targets built. Find your board's
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