Support for NXP T1040 RDB by dgarske · Pull Request #714 · wolfSSL/wolfBoot

dgarske · 2026-03-05T23:41:56Z

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Copilot

Pull request overview

Adds build, HAL, linker, documentation, and Lauterbach scripting needed to bring up and program wolfBoot on the NXP QorIQ T1040 RDB.

Changes:

Introduces a new nxp_t1040 target (build flags, example config, link scripts, HAL wrapper).
Adds T1040-specific test application and updates test-app build logic.
Adds Lauterbach .cmm scripts and target documentation for flashing/debugging.

Reviewed changes

Copilot reviewed 12 out of 14 changed files in this pull request and generated 11 comments.

Show a summary per file

File	Description
tools/scripts/nxp_t1040/t1024_flash.cmm	Adds a TRACE32 NOR flashing script intended for T1040.
tools/scripts/nxp_t1040/t1024_debug.cmm	Adds a TRACE32 debug setup script (CPU/MMU/symbols/breakpoints).
test-app/app_nxp_t1040.c	Adds a simple UART “heartbeat” test app for T1040.
test-app/Makefile	Enables PPC64 build settings for `nxp_t1040`.
hal/nxp_t1040_stage1.ld	Adds stage1 linker script for T1040 boot-from-NOR layout.
hal/nxp_t1040.ld	Adds main linker script for T1040 RAM-loaded image.
hal/nxp_t1040.c	Adds T1040 HAL wrapper to shared T10xx implementation.
hal/nxp_t1024.c	Replaces large T1024-specific HAL with a shared T10xx wrapper include.
hal/nxp_ppc.h	Adds `TARGET_nxp_t1040` platform definitions.
docs/Targets.md	Documents T1040 target, flash map, and build steps.
config/examples/nxp-t1040.config	Adds example configuration for T1040 memory map / partitions.
arch.mk	Adds compiler/linker flags and object selection for `nxp_t1040`.
Makefile	Selects `factory_wstage1.bin` as main target for `nxp_t1040`.

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Copilot · 2026-03-05T23:48:05Z

hal/nxp_ppc.h

+        /* relocate to 64-bit 0xF_ */
+        #define CCSRBAR_PHYS_HIGH 0xFULL
+        #define CCSRBAR_PHYS (CCSRBAR_PHYS_HIGH + CCSRBAR_DEF)
+    #endif


CCSRBAR_PHYS is constructed via addition, which does not form the intended 64-bit address (e.g., 0xF + 0xFE000000 -> 0xFE00000F, not 0xF_FE000000). If callers need a 64-bit physical value, build it using a 64-bit shift/or (or remove CCSRBAR_PHYS entirely and consistently pass (high, low) pairs to helpers like set_law).

Copilot · 2026-03-05T23:48:05Z

tools/scripts/nxp_t1040/t1024_debug.cmm

+; @Title: NXP T2080 wolfBoot Debug Script
+; @Description:
+;   Brings up the T2080, loads wolfBoot ELF symbols, and sets breakpoints
+;   for source-level debugging of wolfBoot running from NOR flash (XIP).
+; @Chip: T2080


This script is under nxp_t1040/ but is configured and documented for T2080 (SYStem.CPU T2080, header says T2080). On a T1040 this will at best misconfigure TRACE32, and at worst apply incorrect init/TLB sequences. Update the header and SYStem.CPU to T1040 (and consider renaming the file to t1040_debug.cmm to match its purpose).

Copilot · 2026-03-05T23:48:05Z

tools/scripts/nxp_t1040/t1024_debug.cmm

+SYStem.RESet
+
+SYStem.BdmClock 15.MHz
+SYStem.CPU T2080


This script is under nxp_t1040/ but is configured and documented for T2080 (SYStem.CPU T2080, header says T2080). On a T1040 this will at best misconfigure TRACE32, and at worst apply incorrect init/TLB sequences. Update the header and SYStem.CPU to T1040 (and consider renaming the file to t1040_debug.cmm to match its purpose).

Copilot · 2026-03-05T23:48:06Z

tools/scripts/nxp_t1040/t1040_debug.cmm

+; Verify wolfBoot code is present at expected location
+&wb_first=Data.Long(D:0xEFFE0000)
+PRINT "wolfBoot first word at 0xEFFE0000: &wb_first"
+IF &wb_first==0xFFFFFFFF
+(
+  PRINT %ERROR "ERROR: wolfBoot region appears erased (0xFFFFFFFF)"
+  PRINT "       Run t2080_flash.cmm first"
+  STOP
+)


The hardcoded wolfBoot address 0xEFFE0000 (and the instruction to run t2080_flash.cmm) conflicts with the T1040 memory map described in this PR (WOLFBOOT_ORIGIN=0xEFF40000 and stage1 at 0xEFFFC000). Update the check/prints to use the T1040 wolfBoot origin (and correct the referenced flash script name) so the debug script validates the same layout the build produces.

Copilot · 2026-03-05T23:48:06Z

tools/scripts/nxp_t1040/t1024_flash.cmm

+  PRINT "   Address: 0xE8000000 (64 KB)"
+  FLASH.UNLOCK 0xE8000000--0xE800FFFF
+  FLASH.ReProgram 0xE8000000--0xE800FFFF /Erase


The script’s hardcoded flash layout appears inconsistent with the T1040 layout/config added in this PR: (1) RCW is described in docs as 128KB but the script erases/programs only 64KB; (2) docs/config place FMAN ucode at 0xEFF00000 and wolfBoot at 0xEFF40000, but the script writes FMAN at 0xE8020000 and wolfBoot at 0xEFFE0000; (3) the script doesn’t program stage1 at 0xEFFFC000 even though the build produces factory_wstage1.bin. Align the script’s addresses/sizes with config/examples/nxp-t1040.config and docs/Targets.md, and include stage1 programming if factory_wstage1.bin is the intended deployment artifact.

Suggested change

PRINT " Address: 0xE8000000 (64 KB)"

FLASH.UNLOCK 0xE8000000--0xE800FFFF

FLASH.ReProgram 0xE8000000--0xE800FFFF /Erase

PRINT " Address: 0xE8000000 (128 KB)"

FLASH.UNLOCK 0xE8000000--0xE801FFFF

FLASH.ReProgram 0xE8000000--0xE801FFFF /Erase

Copilot · 2026-03-05T23:48:06Z

tools/scripts/nxp_t1040/t1024_flash.cmm

+  PRINT "3. Programming wolfBoot bootloader..."
+  PRINT "   Source: &basedir/wolfboot.bin"
+  PRINT "   Address: 0xEFFE0000 (128 KB)"
+  FLASH.UNLOCK 0xEFFE0000--0xEFFFFFFF


The script’s hardcoded flash layout appears inconsistent with the T1040 layout/config added in this PR: (1) RCW is described in docs as 128KB but the script erases/programs only 64KB; (2) docs/config place FMAN ucode at 0xEFF00000 and wolfBoot at 0xEFF40000, but the script writes FMAN at 0xE8020000 and wolfBoot at 0xEFFE0000; (3) the script doesn’t program stage1 at 0xEFFFC000 even though the build produces factory_wstage1.bin. Align the script’s addresses/sizes with config/examples/nxp-t1040.config and docs/Targets.md, and include stage1 programming if factory_wstage1.bin is the intended deployment artifact.

Copilot · 2026-03-05T23:48:07Z

tools/scripts/nxp_t1040/t1024_flash.cmm

+  PRINT "4. Programming test application..."
+  PRINT "   Source: &basedir/test-app/image_v1_signed.bin"
+  PRINT "   Address: 0xEFEE0000 (WOLFBOOT_PARTITION_BOOT_ADDRESS, 1 MB)"
+  FLASH.UNLOCK 0xEFEE0000--0xEFFDFFFF


The script’s hardcoded flash layout appears inconsistent with the T1040 layout/config added in this PR: (1) RCW is described in docs as 128KB but the script erases/programs only 64KB; (2) docs/config place FMAN ucode at 0xEFF00000 and wolfBoot at 0xEFF40000, but the script writes FMAN at 0xE8020000 and wolfBoot at 0xEFFE0000; (3) the script doesn’t program stage1 at 0xEFFFC000 even though the build produces factory_wstage1.bin. Align the script’s addresses/sizes with config/examples/nxp-t1040.config and docs/Targets.md, and include stage1 programming if factory_wstage1.bin is the intended deployment artifact.

Copilot · 2026-03-05T23:48:07Z

test-app/app_nxp_t1040.c

+    /* Wait for reboot */
+    while(1) {
+        for (j=0; j<1000000; j++)
+            ;
+        i++;


The empty delay loop has no side effects and can be optimized away by the compiler, which would remove the intended pacing of UART output. To make the delay reliable, use a hardware timer/udelay equivalent, or force a side effect (e.g., a volatile loop counter and/or an asm volatile barrier inside the loop).

Copilot · 2026-03-05T23:48:07Z

hal/nxp_t1040_stage1.ld

+    /* Platform SRAM - 160KB */
+    PSRAM (rwx) : ORIGIN = 0xFDFC0000, LENGTH = 0x28000
+
+    /* DDR - 8GB: Start at 16MB to avoid using 0x0 (NULL) addresses */


The comment says DDR is 8GB, but the LENGTH expression limits DRAM to below 0x80000000 (i.e., <2GB address space). Either update the comment to reflect the deliberate 32-bit-addressing limit, or adjust the region definition if stage1 is expected to address more of DDR.

Suggested change

/* DDR - 8GB: Start at 16MB to avoid using 0x0 (NULL) addresses */

/* DDR - 32-bit window (<2GB) starting at 16MB to avoid using 0x0 (NULL) addresses */

Copilot · 2026-03-05T23:48:07Z

hal/nxp_t1040.ld

+{
+    /* DDR4 - 8GB (offset by destination address and 4KB boot region) */
+    DRAM (rwx) : ORIGIN = @WOLFBOOT_STAGE1_LOAD_ADDR@,
+                 LENGTH = 0x7FFFFFFF - 4K - @WOLFBOOT_STAGE1_LOAD_ADDR@


As written, the DRAM region is capped at 0x7FFFFFFF, which contradicts the DDR4 - 8GB comment. If this is intentional (keeping everything within 31-bit/32-bit addressing), please document that rationale explicitly; otherwise, adjust the upper bound to match the 8GB target.

Suggested change

LENGTH = 0x7FFFFFFF - 4K - @WOLFBOOT_STAGE1_LOAD_ADDR@

LENGTH = 0x200000000 - 4K - @WOLFBOOT_STAGE1_LOAD_ADDR@

Support for NXP T1040 RDB

1029bd3

dgarske self-assigned this Mar 5, 2026

Copilot AI review requested due to automatic review settings March 5, 2026 23:41

Copilot AI reviewed Mar 5, 2026

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Progress testing

822cf9a

dgarske force-pushed the nxp_t1040 branch from 78a4584 to 822cf9a Compare March 6, 2026 00:51

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Support for NXP T1040 RDB#714

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	/* DDR - 8GB: Start at 16MB to avoid using 0x0 (NULL) addresses */
	/* DDR - 32-bit window (<2GB) starting at 16MB to avoid using 0x0 (NULL) addresses */

	LENGTH = 0x7FFFFFFF - 4K - @WOLFBOOT_STAGE1_LOAD_ADDR@
	LENGTH = 0x200000000 - 4K - @WOLFBOOT_STAGE1_LOAD_ADDR@

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